diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-03-06 19:11:52 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-03-06 19:11:52 +0000 |
| commit | 43b29cf891c78a2cd01d22a2731c7da828d79e0a (patch) | |
| tree | 8f1b3eaba031a92dbc4a128a4ddd2c81cf6a552d /src/devices/pci_ops.c | |
| parent | ae762b5d3b84b2b6f8cf80195d10e9544605aa4a (diff) | |
| download | coreboot-43b29cf891c78a2cd01d22a2731c7da828d79e0a.tar.xz | |
Fix mmconf (PCIe memory mapped config space access) support in v2. It was
horribly broken and thus never used by any platform. This needs to get
straightened out so current chipsets drivers can use the full feature set.
Create wrapper functions similar to the io pci config space ones.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices/pci_ops.c')
| -rw-r--r-- | src/devices/pci_ops.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/src/devices/pci_ops.c b/src/devices/pci_ops.c index 412b0c5b4b..c6d85f284e 100644 --- a/src/devices/pci_ops.c +++ b/src/devices/pci_ops.c @@ -3,6 +3,7 @@ * * Copyright (C) 2004 Linux Networx * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) + * Copyright (C) 2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -79,3 +80,41 @@ void pci_write_config32(device_t dev, unsigned where, uint32_t val) struct bus *pbus = get_pbus(dev); ops_pci_bus(pbus)->write32(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val); } + +#if MMCONF_SUPPORT +uint8_t pci_mmio_read_config8(device_t dev, unsigned where) +{ + struct bus *pbus = get_pbus(dev); + return pci_ops_mmconf.read8(pbus, dev->bus->secondary, dev->path.pci.devfn, where); +} + +uint16_t pci_mmio_read_config16(device_t dev, unsigned where) +{ + struct bus *pbus = get_pbus(dev); + return pci_ops_mmconf.read16(pbus, dev->bus->secondary, dev->path.pci.devfn, where); +} + +uint32_t pci_mmio_read_config32(device_t dev, unsigned where) +{ + struct bus *pbus = get_pbus(dev); + return pci_ops_mmconf.read32(pbus, dev->bus->secondary, dev->path.pci.devfn, where); +} + +void pci_mmio_write_config8(device_t dev, unsigned where, uint8_t val) +{ + struct bus *pbus = get_pbus(dev); + pci_ops_mmconf.write8(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val); +} + +void pci_mmio_write_config16(device_t dev, unsigned where, uint16_t val) +{ + struct bus *pbus = get_pbus(dev); + pci_ops_mmconf.write16(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val); +} + +void pci_mmio_write_config32(device_t dev, unsigned where, uint32_t val) +{ + struct bus *pbus = get_pbus(dev); + pci_ops_mmconf.write32(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val); +} +#endif |