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| author | Vadim Bendebury <vbendeb@chromium.org> | 2011-10-03 14:58:57 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-03-29 20:19:27 +0200 |
| commit | 22c0468d3927a370b9723e9e78714c2731d33a81 (patch) | |
| tree | e2eacd3c2bd07653ef303ed0219557bf0d222e44 /src/devices/pciexp_device.c | |
| parent | 2e43867a20107014cba1f32137adfee8af35a05d (diff) | |
| download | coreboot-22c0468d3927a370b9723e9e78714c2731d33a81.tar.xz | |
Refactor publishing CBMEM addresses through coreboot table.
We need to provide u-boot access to several different CBMEM
sections. To do that, a common coreboot table structure is used,
just different tags match different coreboot table sections.
Also, the code is added to export CBMEM console and MRC cache
addresses through the same mechanism.
Change-Id: I63adb67093b8b50ee61b0deb0b56ebb2c4856895
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/724
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/devices/pciexp_device.c')
0 files changed, 0 insertions, 0 deletions