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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-04 23:23:47 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-04 23:23:47 +0000
commite4870474b9026ad6b2ccabe59a8623e28722007f (patch)
tree45905ef12a2941f731e3ea74f1e55e197556c0a7 /src/devices/pciexp_device.c
parent305e8861d66b050a3e35133603acce69324349fe (diff)
downloadcoreboot-e4870474b9026ad6b2ccabe59a8623e28722007f.tar.xz
Various cosmetic and coding style fixes in src/devices.
Also: - Improve a few code comments, fix typos, etc. - Change a few more variable types to u8/u16/u32 etc. - Make some very long lines fit into 80chars/line. - Drop a huge duplicated comment, use "@see" to refer to the other one. - Reduce nesting level a bit by restructuring some code chunks. - s/Config.lb/devicetree.cb/ in a few places. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices/pciexp_device.c')
-rw-r--r--src/devices/pciexp_device.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/devices/pciexp_device.c b/src/devices/pciexp_device.c
index 0349f96c0c..b190285c3b 100644
--- a/src/devices/pciexp_device.c
+++ b/src/devices/pciexp_device.c
@@ -27,6 +27,9 @@
static void pciexp_tune_dev(device_t dev)
{
unsigned int cap;
+#ifdef CONFIG_PCIE_TUNING
+ u32 reg32;
+#endif
cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
if (!cap)
@@ -35,9 +38,9 @@ static void pciexp_tune_dev(device_t dev)
#ifdef CONFIG_PCIE_TUNING
printk(BIOS_DEBUG, "PCIe: tuning %s\n", dev_path(dev));
- // TODO make this depending on ASPM
- /* Enable ASPM Role Based Error Reporting */
- u32 reg32;
+ // TODO make this depending on ASPM.
+
+ /* Enable ASPM role based error reporting. */
reg32 = pci_read_config32(dev, cap + PCI_EXP_DEVCAP);
reg32 |= PCI_EXP_DEVCAP_RBER;
pci_write_config32(dev, cap + PCI_EXP_DEVCAP, reg32);