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authorUwe Hermann <uwe@hermann-uwe.de>2010-10-18 00:00:57 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-18 00:00:57 +0000
commitd453dd0c4d8c31e508abea8dd14e616b9c61da71 (patch)
treeb7936a64d9aedf890f9beb19dde235a2e3262cfd /src/devices/pcix_device.c
parenta600a3f7000b3cc1bb14999bd834103b7c4c0b13 (diff)
downloadcoreboot-d453dd0c4d8c31e508abea8dd14e616b9c61da71.tar.xz
Cosmetics and coding style fixes in devices/*.
- Whitespace and indentation fixes in various places. - Fix various typos. - Use u8, u16 etc. everywhere. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices/pcix_device.c')
-rw-r--r--src/devices/pcix_device.c59
1 files changed, 31 insertions, 28 deletions
diff --git a/src/devices/pcix_device.c b/src/devices/pcix_device.c
index 42babe79dd..22dd06e5bd 100644
--- a/src/devices/pcix_device.c
+++ b/src/devices/pcix_device.c
@@ -26,20 +26,21 @@
static void pcix_tune_dev(device_t dev)
{
- unsigned cap;
- unsigned status, orig_cmd, cmd;
- unsigned max_read, max_tran;
+ u32 status;
+ u16 orig_cmd, cmd;
+ unsigned int cap, max_read, max_tran;
- if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL) {
+ if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL)
return;
- }
+
cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
- if (!cap) {
+ if (!cap)
return;
- }
+
printk(BIOS_DEBUG, "%s PCI-X tuning\n", dev_path(dev));
+
status = pci_read_config32(dev, cap + PCI_X_STATUS);
- orig_cmd = cmd = pci_read_config16(dev,cap + PCI_X_CMD);
+ orig_cmd = cmd = pci_read_config16(dev, cap + PCI_X_CMD);
max_read = (status & PCI_X_STATUS_MAX_READ) >> 21;
max_tran = (status & PCI_X_STATUS_MAX_SPLIT) >> 23;
@@ -51,23 +52,26 @@ static void pcix_tune_dev(device_t dev)
cmd &= ~PCI_X_CMD_MAX_SPLIT;
cmd |= max_tran << 4;
}
- /* Don't attempt to handle PCI-X errors */
+
+ /* Don't attempt to handle PCI-X errors. */
cmd &= ~PCI_X_CMD_DPERR_E;
- /* Enable Relaxed Ordering */
+
+ /* Enable Relaxed Ordering. */
cmd |= PCI_X_CMD_ERO;
- if (orig_cmd != cmd) {
+
+ if (orig_cmd != cmd)
pci_write_config16(dev, cap + PCI_X_CMD, cmd);
- }
}
static void pcix_tune_bus(struct bus *bus)
{
device_t child;
- for(child = bus->children; child; child = child->sibling)
+
+ for (child = bus->children; child; child = child->sibling)
pcix_tune_dev(child);
}
-const char *pcix_speed(unsigned sstatus)
+const char *pcix_speed(u16 sstatus)
{
static const char conventional[] = "Conventional PCI";
static const char pcix_66mhz[] = "66MHz PCI-X";
@@ -76,10 +80,11 @@ const char *pcix_speed(unsigned sstatus)
static const char pcix_266mhz[] = "266MHz PCI-X";
static const char pcix_533mhz[] = "533MHZ PCI-X";
static const char unknown[] = "Unknown";
-
const char *result;
+
result = unknown;
- switch(PCI_X_SSTATUS_MFREQ(sstatus)) {
+
+ switch (PCI_X_SSTATUS_MFREQ(sstatus)) {
case PCI_X_SSTATUS_CONVENTIONAL_PCI:
result = conventional;
break;
@@ -89,17 +94,14 @@ const char *pcix_speed(unsigned sstatus)
case PCI_X_SSTATUS_MODE1_100MHZ:
result = pcix_100mhz;
break;
-
case PCI_X_SSTATUS_MODE1_133MHZ:
result = pcix_133mhz;
break;
-
case PCI_X_SSTATUS_MODE2_266MHZ_REF_66MHZ:
case PCI_X_SSTATUS_MODE2_266MHZ_REF_100MHZ:
case PCI_X_SSTATUS_MODE2_266MHZ_REF_133MHZ:
result = pcix_266mhz;
break;
-
case PCI_X_SSTATUS_MODE2_533MHZ_REF_66MHZ:
case PCI_X_SSTATUS_MODE2_533MHZ_REF_100MHZ:
case PCI_X_SSTATUS_MODE2_533MHZ_REF_133MHZ:
@@ -111,20 +113,21 @@ const char *pcix_speed(unsigned sstatus)
unsigned int pcix_scan_bridge(device_t dev, unsigned int max)
{
- unsigned pos;
- unsigned sstatus;
+ unsigned int pos;
+ u16 sstatus;
max = do_pci_scan_bridge(dev, max, pci_scan_bus);
- /* Find the PCI-X capability */
+
+ /* Find the PCI-X capability. */
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
sstatus = pci_read_config16(dev, pos + PCI_X_SEC_STATUS);
- if (PCI_X_SSTATUS_MFREQ(sstatus) != PCI_X_SSTATUS_CONVENTIONAL_PCI) {
+ if (PCI_X_SSTATUS_MFREQ(sstatus) != PCI_X_SSTATUS_CONVENTIONAL_PCI)
pcix_tune_bus(dev->link_list);
- }
- /* Print the PCI-X bus speed */
- printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary, pcix_speed(sstatus));
+ /* Print the PCI-X bus speed. */
+ printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary,
+ pcix_speed(sstatus));
return max;
}
@@ -138,8 +141,8 @@ struct device_operations default_pcix_ops_bus = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
- .init = 0,
- .scan_bus = pcix_scan_bridge,
+ .init = 0,
+ .scan_bus = pcix_scan_bridge,
.enable = 0,
.reset_bus = pci_bus_reset,
.ops_pci = &pcix_bus_ops_pci,