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authorEric Biederman <ebiederm@xmission.com>2003-09-02 03:36:25 +0000
committerEric Biederman <ebiederm@xmission.com>2003-09-02 03:36:25 +0000
commite9a271e32c53076445ef70da8aec8201c82693ec (patch)
treeaf88f51ba907922157d3b97f9713a07480223372 /src/devices/root_device.c
parentd4c14524f53d8e812cf52b57e16c53d259c44ea0 (diff)
downloadcoreboot-e9a271e32c53076445ef70da8aec8201c82693ec.tar.xz
- Major update of the dynamic device tree so it can handle
* subtractive resources * merging with the static device tree * more device types than just pci - The piece to watch out for is the new enable_resources method that was needed in all of the drivers git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices/root_device.c')
-rw-r--r--src/devices/root_device.c127
1 files changed, 127 insertions, 0 deletions
diff --git a/src/devices/root_device.c b/src/devices/root_device.c
new file mode 100644
index 0000000000..c05a2cd015
--- /dev/null
+++ b/src/devices/root_device.c
@@ -0,0 +1,127 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+
+/**
+ * Read the resources for the root device,
+ * that encompase the resources for the entire system.
+ * @param root Pointer to the device structure for the system root device
+ */
+void root_dev_read_resources(device_t root)
+{
+ int res = 0;
+
+ /* Initialize the system wide io space constraints */
+ root->resource[res].base = 0x400;
+ root->resource[res].size = 0;
+ root->resource[res].align = 0;
+ root->resource[res].gran = 0;
+ root->resource[res].limit = 0xffffUL;
+ root->resource[res].flags = IORESOURCE_IO;
+ root->resource[res].index = 0;
+ compute_allocate_resource(&root->link[0], &root->resource[res],
+ IORESOURCE_IO, IORESOURCE_IO);
+ res++;
+
+ /* Initialize the system wide memory resources constraints */
+ root->resource[res].base = 0;
+ root->resource[res].size = 0;
+ root->resource[res].align = 0;
+ root->resource[res].gran = 0;
+ root->resource[res].limit = 0xffffffffUL;
+ root->resource[res].flags = IORESOURCE_MEM;
+ root->resource[res].index = 1;
+ compute_allocate_resource(&root->link[0], &root->resource[res],
+ IORESOURCE_MEM, IORESOURCE_MEM);
+ res++;
+
+ root->resources = res;
+}
+
+/**
+ * Write the resources for the root device,
+ * and every device under it which are all of the devices.
+ * @param root Pointer to the device structure for the system root device
+ */
+void root_dev_set_resources(device_t root)
+{
+ struct bus *bus;
+ bus = &root->link[0];
+ compute_allocate_resource(bus,
+ &root->resource[0], IORESOURCE_IO, IORESOURCE_IO);
+ compute_allocate_resource(bus,
+ &root->resource[1], IORESOURCE_MEM, IORESOURCE_MEM);
+ assign_resources(bus);
+}
+
+/**
+ * Walk through devices on the motherboard and scan for devices behind
+ * them.
+ * @param root Pointer to the device structure for the system root device
+ * @param max Maximum bus number allowed in the system.
+ * @return Largest bus number used.
+ */
+unsigned int walk_static_devices(device_t bus, unsigned int max)
+{
+ device_t child;
+ unsigned link;
+ for(link = 0; link < bus->links; link++) {
+ for(child = bus->link[link].children; child; child = child->sibling) {
+ if (child->ops && child->ops->enable) {
+ child->ops->enable(child);
+ }
+ printk_debug("%s %s\n",
+ dev_path(child),
+ child->enable?"enabled": "disabled");
+ }
+ }
+ for(link = 0; link < bus->links; link++) {
+ for(child = bus->link[link].children; child; child = child->sibling) {
+ if (!child->ops || !child->ops->scan_bus)
+ continue;
+ printk_debug("%s scanning...\n", dev_path(child));
+ max = child->ops->scan_bus(child, max);
+ }
+ }
+ return max;
+}
+
+void enable_childrens_resources(device_t dev)
+{
+ unsigned link;
+ for(link = 0; link < dev->links; link++) {
+ device_t child;
+ for(child = dev->link[link].children; child; child = child->sibling) {
+ enable_resources(child);
+ }
+ }
+}
+
+unsigned int root_dev_scan_pci_bus(device_t root, unsigned int max)
+{
+ return pci_scan_bus(&root->link[0], 0, 0xff, max);
+}
+
+struct device_operations default_dev_ops_root = {
+ .read_resources = root_dev_read_resources,
+ .set_resources = root_dev_set_resources,
+ .enable_resources = enable_childrens_resources,
+ .init = 0,
+ .scan_bus = root_dev_scan_pci_bus,
+};
+
+/**
+ * This is the root of the device tree. A PCI tree always has
+ * one bus, bus 0. Bus 0 contains devices and bridges.
+ */
+struct device dev_root = {
+ .ops = &default_dev_ops_root,
+ .bus = &dev_root.link[0],
+ .links = 1,
+ .link = {
+ [0] = {
+ .dev = &dev_root,
+ .link = 0,
+ },
+ },
+};