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authorYinghai Lu <yinghailu@gmail.com>2005-01-13 19:14:52 +0000
committerYinghai Lu <yinghailu@gmail.com>2005-01-13 19:14:52 +0000
commitc7870ace3941de283f1f8c2f0783f80f897651e2 (patch)
treeca4cf7c1081798f550e6685b5e9c8fce447ed40b /src/devices
parente74f91a9017ab5412060f71cbf0eb78f53231947 (diff)
downloadcoreboot-c7870ace3941de283f1f8c2f0783f80f897651e2.tar.xz
onboard pci_onboard works
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/pci_device.c19
1 files changed, 9 insertions, 10 deletions
diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index fb84811cee..d7ba57b262 100644
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -221,16 +221,6 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
/* Initialize the resources to nothing */
resource = new_resource(dev, index);
- /* for on board device with embedded ROM image, the ROM image is at
- * fixed address specified in the Config.lb, the dev->rom_address is
- * inited by driver_pci_onboard_ops::enable_dev() */
- if ((dev->on_mainboard) && (dev->rom_address != 0)) {
- resource->base = dev->rom_address;
- resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY |
- IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
- return;
- }
-
/* Get the initial value */
value = pci_read_config32(dev, index);
@@ -268,6 +258,15 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
} else {
resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
}
+
+ /* for on board device with embedded ROM image, the ROM image is at
+ * fixed address specified in the Config.lb, the dev->rom_address is
+ * inited by driver_pci_onboard_ops::enable_dev() */
+ if ((dev->on_mainboard) && (dev->rom_address == 0)) {
+ resource->base = dev->rom_address;
+ resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY |
+ IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+ }
}
/** Read the base address registers for a given device.