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authorMyles Watson <mylesgw@gmail.com>2009-11-06 23:42:26 +0000
committerMyles Watson <mylesgw@gmail.com>2009-11-06 23:42:26 +0000
commitd27c08c2898d1d74765a7799628d1c18369fd671 (patch)
tree7ac357d2b44d833c6efe70d1e691c6611c521e8d /src/devices
parent547d48ab01049a634dccb16d1847524d5ba93e33 (diff)
downloadcoreboot-d27c08c2898d1d74765a7799628d1c18369fd671.tar.xz
Remove drivers/pci/onboard. The only purpose was for option ROMs, which are
now handled more generically using CBFS. Simplify the option ROM code in device/pci_rom.c, since there are only two ways to get a ROM address now (CBFS and the device) and add an exception for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/pci_device.c17
-rw-r--r--src/devices/pci_rom.c55
2 files changed, 26 insertions, 46 deletions
diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index 2360028756..3373c8481c 100644
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -285,11 +285,6 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
unsigned long value;
resource_t moving;
- if ((dev->on_mainboard) && (dev->rom_address == 0)) {
- /* Skip it if rom_address is not set in the MB Config.lb. */
- return;
- }
-
/* Initialize the resources to nothing. */
resource = new_resource(dev, index);
@@ -326,18 +321,6 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
}
resource->flags = 0;
}
-
- /* For on board device with embedded ROM image, the ROM image is at
- * fixed address specified in the Config.lb, the dev->rom_address is
- * inited by driver_pci_onboard_ops::enable_dev() */
- if ((dev->on_mainboard) && (dev->rom_address != 0)) {
- resource->base = dev->rom_address;
- /* The resource allocator needs the size to be non-zero. */
- resource->size = 0x100;
- resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY |
- IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
- }
-
compact_resources(dev);
}
diff --git a/src/devices/pci_rom.c b/src/devices/pci_rom.c
index cafeed4897..9b2d281129 100644
--- a/src/devices/pci_rom.c
+++ b/src/devices/pci_rom.c
@@ -31,42 +31,37 @@
struct rom_header * pci_rom_probe(struct device *dev)
{
- unsigned long rom_address = 0;
struct rom_header *rom_header;
struct pci_data *rom_data;
- void *v;
- /* if it's in FLASH, then it's as if dev->on_mainboard was true */
- v = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
- printk_debug("In cbfs, rom address for %s = %p\n",
- dev_path(dev), v);
- if (v) {
- dev->rom_address = (u32)v;
- dev->on_mainboard = 1;
- }
+ /* If it's in FLASH, then don't check device for ROM. */
+ rom_header = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
- if (dev->on_mainboard) {
- // in case some device PCI_ROM_ADDRESS can not be set or readonly
- rom_address = dev->rom_address;
- printk_debug("On mainboard, rom address for %s = %lx\n",
- dev_path(dev), rom_address);
+ if (rom_header) {
+ printk_debug("In cbfs, rom address for %s = %p\n",
+ dev_path(dev), rom_header);
} else {
+ unsigned long rom_address;
+
rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
- printk_debug("On card, rom address for %s = %lx\n",
- dev_path(dev), rom_address);
- }
- if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
- return NULL;
- }
+ if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
+ #if CONFIG_BOARD_EMULATION_QEMU_X86
+ rom_address = 0xc0000;
+ #else
+ return NULL;
+ #endif
+ } else {
+ /* enable expansion ROM address decoding */
+ pci_write_config32(dev, PCI_ROM_ADDRESS,
+ rom_address|PCI_ROM_ADDRESS_ENABLE);
+ }
- if(!dev->on_mainboard) {
- /* enable expansion ROM address decoding */
- pci_write_config32(dev, PCI_ROM_ADDRESS,
- rom_address|PCI_ROM_ADDRESS_ENABLE);
+ printk_debug("On card, rom address for %s = %lx\n",
+ dev_path(dev), rom_address);
+ rom_header = (struct rom_header *)rom_address;
}
- rom_header = (struct rom_header *)rom_address;
printk_spew("PCI Expansion ROM, signature 0x%04x, INIT size 0x%04x, data ptr 0x%04x\n",
le32_to_cpu(rom_header->signature),
rom_header->size * 512, le32_to_cpu(rom_header->data));
@@ -76,11 +71,12 @@ struct rom_header * pci_rom_probe(struct device *dev)
return NULL;
}
- rom_data = (struct pci_data *) ((void *)rom_header + le32_to_cpu(rom_header->data));
+ rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data));
+
printk_spew("PCI ROM Image, Vendor %04x, Device %04x,\n",
rom_data->vendor, rom_data->device);
if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) {
- printk_err("Device or Vendor ID mismatch Vendor %04x, Device %04x\n",
+ printk_err("ID mismatch: Vendor ID %04x, Device ID %04x\n",
rom_data->vendor, rom_data->device);
return NULL;
}
@@ -90,7 +86,8 @@ struct rom_header * pci_rom_probe(struct device *dev)
rom_data->type);
if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
printk_debug("Class Code mismatch ROM %08x, dev %08x\n",
- (rom_data->class_hi << 8) | rom_data->class_lo, dev->class);
+ (rom_data->class_hi << 8) | rom_data->class_lo,
+ dev->class);
//return NULL;
}