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authorStefan Reinauer <stepan@coresystems.de>2010-04-27 06:56:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-27 06:56:47 +0000
commit14e22779625de673569c7b950ecc2753fb915b31 (patch)
tree14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/drivers/ati
parent0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff)
downloadcoreboot-14e22779625de673569c7b950ecc2753fb915b31.tar.xz
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/drivers/ati')
-rw-r--r--src/drivers/ati/ragexl/atyfb.h2
-rw-r--r--src/drivers/ati/ragexl/fb.h14
-rw-r--r--src/drivers/ati/ragexl/fbcon.h6
-rw-r--r--src/drivers/ati/ragexl/mach64.h2
-rw-r--r--src/drivers/ati/ragexl/mach64_ct.c26
-rw-r--r--src/drivers/ati/ragexl/xlinit.c98
6 files changed, 74 insertions, 74 deletions
diff --git a/src/drivers/ati/ragexl/atyfb.h b/src/drivers/ati/ragexl/atyfb.h
index 3d9a8c5aa1..99a87b3371 100644
--- a/src/drivers/ati/ragexl/atyfb.h
+++ b/src/drivers/ati/ragexl/atyfb.h
@@ -1,7 +1,7 @@
/*
* ATI Frame Buffer Device Driver Core Definitions
*/
-
+
#define PLL_CRTC_DECODE 0
#define EINVAL -1
diff --git a/src/drivers/ati/ragexl/fb.h b/src/drivers/ati/ragexl/fb.h
index 01f2887707..48d0f0172f 100644
--- a/src/drivers/ati/ragexl/fb.h
+++ b/src/drivers/ati/ragexl/fb.h
@@ -119,7 +119,7 @@ struct fb_fix_screeninfo {
u32 smem_len; /* Length of frame buffer mem */
u32 type; /* see FB_TYPE_* */
u32 type_aux; /* Interleave for interleaved Planes */
- u32 visual; /* see FB_VISUAL_* */
+ u32 visual; /* see FB_VISUAL_* */
u16 xpanstep; /* zero if no hardware panning */
u16 ypanstep; /* zero if no hardware panning */
u16 ywrapstep; /* zero if no hardware ywrap */
@@ -142,8 +142,8 @@ struct fb_fix_screeninfo {
struct fb_bitfield {
u32 offset; /* beginning of bitfield */
u32 length; /* length of bitfield */
- u32 msb_right; /* != 0 : Most significant bit is */
- /* right */
+ u32 msb_right; /* != 0 : Most significant bit is */
+ /* right */
};
#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
@@ -191,7 +191,7 @@ struct fb_var_screeninfo {
struct fb_bitfield red; /* bitfield in fb mem if true color, */
struct fb_bitfield green; /* else only length is significant */
struct fb_bitfield blue;
- struct fb_bitfield transp; /* transparency */
+ struct fb_bitfield transp; /* transparency */
u32 nonstd; /* != 0 Non standard pixel format */
@@ -326,7 +326,7 @@ struct fb_info {
devfs_handle_t devfs_handle; /* Devfs handle for new name */
devfs_handle_t devfs_lhandle; /* Devfs handle for compat. symlink */
int (*changevar)(int); /* tell console var has changed */
- int (*switch_con)(int, struct fb_info*);
+ int (*switch_con)(int, struct fb_info*);
/* tell fb to switch consoles */
int (*updatevar)(int, struct fb_info*);
/* tell fb to update the vars */
@@ -338,7 +338,7 @@ struct fb_info {
the cursor's color for non
palette mode */
/* From here on everything is device dependent */
- void *par;
-};
+ void *par;
+};
#endif /* _LINUX_FB_H */
diff --git a/src/drivers/ati/ragexl/fbcon.h b/src/drivers/ati/ragexl/fbcon.h
index 974e373215..d6f122cbb0 100644
--- a/src/drivers/ati/ragexl/fbcon.h
+++ b/src/drivers/ati/ragexl/fbcon.h
@@ -16,7 +16,7 @@ struct display {
struct fb_var_screeninfo var; /* variable infos. yoffset and vmode */
/* are updated by fbcon.c */
struct fb_cmap cmap; /* colormap */
- char *screen_base; /* pointer to top of virtual screen */
+ char *screen_base; /* pointer to top of virtual screen */
/* (virtual address) */
int visual;
int type; /* see FB_TYPE_* */
@@ -96,11 +96,11 @@ struct display {
((s) & 0x400)
#define attr_blink(p,s) \
((s) & 0x8000)
-
+
/*
* Scroll Method
*/
-
+
/* Internal flags */
#define __SCROLL_YPAN 0x001
#define __SCROLL_YWRAP 0x002
diff --git a/src/drivers/ati/ragexl/mach64.h b/src/drivers/ati/ragexl/mach64.h
index c3afff28aa..e0dae0df28 100644
--- a/src/drivers/ati/ragexl/mach64.h
+++ b/src/drivers/ati/ragexl/mach64.h
@@ -5,7 +5,7 @@
* written with much help from Jon Howell
*
* Updated for 3D RAGE PRO and 3D RAGE Mobility by Geert Uytterhoeven
- *
+ *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
diff --git a/src/drivers/ati/ragexl/mach64_ct.c b/src/drivers/ati/ragexl/mach64_ct.c
index ca5283de27..b34be821fb 100644
--- a/src/drivers/ati/ragexl/mach64_ct.c
+++ b/src/drivers/ati/ragexl/mach64_ct.c
@@ -5,7 +5,7 @@
#if 0
#define FAIL(x) do { printk(BIOS_DEBUG, x); return -EINVAL; } while (0)
#else
-#define FAIL(x)
+#define FAIL(x)
#endif
static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
@@ -34,7 +34,7 @@ static int aty_dsp_gt(const struct fb_info_aty *info, u32 bpp,
#if DEBUG_PLL==1
printk(BIOS_DEBUG, "aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
#endif
-
+
/* (64*xclk/vclk/bpp)<<11 = xclocks_per_row<<11 */
xclks_per_row = ((u32)pll->mclk_fb_mult * (u32)pll->mclk_fb_div *
(u32)pll->vclk_post_div_real * 64) << 11;
@@ -98,11 +98,11 @@ static int aty_dsp_gt(const struct fb_info_aty *info, u32 bpp,
t_rp = ((memcntl >> 8) & 0x03) + 1;
t_ras = ((memcntl >> 16) & 0x07) + 1;
t_lat = (memcntl >> 4) & 0x03;
-
+
t_pfc = t_rp + t_rcd + t_crd;
t_rcc = max(t_rp + t_ras, t_pfc + n);
-
+
/* fifo_on<<6 */
fifo_on = (2 * t_rcc + t_pfc + n - 1) << 6;
@@ -125,9 +125,9 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
int pllmclk, pllsclk;
#endif
u32 q;
-
+
pll->pll_ref_div = info->pll_per*2*255/info->ref_clk_per;
-
+
/* FIXME: use the VTB/GTB /3 post divider if it's better suited */
/* actually 8*q */
@@ -145,14 +145,14 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
pll->mclk_post_div_real = 1;
pll->sclk_fb_div = q*pll->mclk_post_div_real/8;
-#if DEBUG_PLL==1
+#if DEBUG_PLL==1
pllsclk = (1000000 * 2 * pll->sclk_fb_div) /
(info->ref_clk_per * pll->pll_ref_div);
printk(BIOS_DEBUG, "aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
pllsclk, pllsclk / pll->mclk_post_div_real);
#endif
-
+
pll->mclk_fb_mult = M64_HAS(MFB_TIMES_4) ? 4 : 2;
/* actually 8*q */
@@ -177,7 +177,7 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
printk(BIOS_DEBUG, "aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
pllmclk, pllmclk / pll->xclk_post_div_real);
#endif
-
+
/* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
q = info->ref_clk_per*pll->pll_ref_div*4/vclk_per; /* actually 8*q */
if (q < 16*8 || q > 255*8)
@@ -199,7 +199,7 @@ static void aty_calc_pll_ct(const struct fb_info_aty *info, struct pll_ct *pll)
u8 xpostdiv = 0;
u8 mpostdiv = 0;
u8 vpostdiv = 0;
-
+
if (M64_HAS(SDRAM_MAGIC_PLL) && (info->ram_type >= SDRAM))
pll->pll_gen_cntl = 0x64; /* mclk = sclk */
else
@@ -221,7 +221,7 @@ static void aty_calc_pll_ct(const struct fb_info_aty *info, struct pll_ct *pll)
}
pll->spll_cntl2 = mpostdiv << 4; /* sclk == pllsclk / mpostdiv */
-
+
switch (pll->xclk_post_div_real) {
case 1:
xpostdiv = 0;
@@ -316,12 +316,12 @@ void aty_set_pll_ct(const struct fb_info_aty *info, const union aty_pll *pll)
aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, info);
aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, info); // for XCLK
-
+
aty_st_pll(SPLL_CNTL2, pll->ct.spll_cntl2, info);
aty_st_pll(SCLK_FB_DIV, pll->ct.sclk_fb_div, info); // for MCLK
aty_st_pll(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, info);
-
+
aty_st_pll(EXT_VPLL_CNTL, 0, info);
aty_st_pll(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, info);
aty_st_pll(VCLK_POST_DIV, pll->ct.vclk_post_div, info);
diff --git a/src/drivers/ati/ragexl/xlinit.c b/src/drivers/ati/ragexl/xlinit.c
index d776c26a78..8b02239833 100644
--- a/src/drivers/ati/ragexl/xlinit.c
+++ b/src/drivers/ati/ragexl/xlinit.c
@@ -96,7 +96,7 @@ static const struct xl_card_cfg_t {
0x10, 0x19
}
};
-
+
typedef struct {
u8 lcd_reg;
u32 val;
@@ -202,7 +202,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
u32 temp;
union aty_pll pll;
const struct xl_card_cfg_t * card = &card_cfg[xl_card];
-
+
aty_st_8(CONFIG_STAT0, 0x85, info);
mdelay(10);
@@ -222,7 +222,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
info->features &= ~M64F_MFB_TIMES_4;
}
#endif
-
+
/*
* Calculate mclk and xclk dividers, etc. The passed
* pixclock and bpp values don't matter yet, the vclk
@@ -243,7 +243,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
aty_st_pll(PLL_EXT_CNTL, pll.ct.pll_ext_cntl, info);
aty_st_pll(SPLL_CNTL2, 0x03, info);
aty_st_pll(PLL_GEN_CNTL, 0x44, info);
-
+
reset_clocks(info, &pll.ct, 0);
mdelay(10);
@@ -302,7 +302,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
aty_st_8(LCD_INDEX, 0x08, info);
aty_st_8(LCD_DATA, 0x0B, info);
mdelay(2);
-
+
// enable display requests, enable CRTC
aty_st_8(CRTC_GEN_CNTL+3, 0x02, info);
// disable display
@@ -482,7 +482,7 @@ static void aty_calc_mem_refresh(struct fb_info_aty *info, u16 id, int xclk)
info->mem_refresh_rate = i;
}
#endif /*CONFIG_CONSOLE_BTEXT */
-static void ati_ragexl_init(device_t dev)
+static void ati_ragexl_init(device_t dev)
{
u32 chip_id;
int j;
@@ -513,9 +513,9 @@ static void ati_ragexl_init(device_t dev)
#endif /*CONFIG_CONSOLE_BTEXT==1 */
struct fb_info_aty *info;
- struct fb_info_aty info_t;
- struct resource *res;
- info = &info_t;
+ struct fb_info_aty info_t;
+ struct resource *res;
+ info = &info_t;
#define USE_AUX_REG 1
@@ -529,12 +529,12 @@ static void ati_ragexl_init(device_t dev)
info->frame_buffer = res->base;
#endif /* CONFIG_CONSOLE_BTEXT */
-#if USE_AUX_REG==0
+#if USE_AUX_REG==0
info->ati_regbase = res->base+0x7ff000+0xc00;
-#else
+#else
res = &dev->resource[2];
if(res->flags & IORESOURCE_MEM) {
- info->ati_regbase = res->base+0x400; //using auxiliary register
+ info->ati_regbase = res->base+0x400; //using auxiliary register
}
#endif
@@ -570,7 +570,7 @@ found:
/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
if (mclk == 67 && info->ram_type < SDRAM)
mclk = 63;
- }
+ }
#endif
#if CONFIG_CONSOLE_BTEXT==1
aty_calc_mem_refresh(info, type, xclk);
@@ -583,14 +583,14 @@ found:
// info->dac_ops = &aty_dac_ct;
// info->pll_ops = &aty_pll_ct;
info->bus_type = PCI;
-
+
atyfb_xl_init(info);
#if CONFIG_CONSOLE_BTEXT==1
info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) & 0x07);
-
+
info->ref_clk_per = 1000000000000ULL/14318180;
xtal = "14.31818";
#if 0
@@ -719,7 +719,7 @@ found:
}
if (atyfb_decode_var(&var, &info->default_par, info)) {
-#if 0
+#if 0
printk(BIOS_DEBUG, "atyfb: can't set default video mode\n");
#endif
return ;
@@ -779,7 +779,7 @@ found:
#endif
btext_clearscreen();
-
+
map_boot_text();
#if 0
@@ -791,7 +791,7 @@ found:
#endif
#endif /* CONFIG_CONSOLE_BTEXT */
-
+
}
#if CONFIG_CONSOLE_BTEXT==1
@@ -856,13 +856,13 @@ static void aty_set_crtc(const struct fb_info_aty *info,
static int aty_var_to_crtc(const struct fb_info_aty *info,
const struct fb_var_screeninfo *var,
struct crtc *crtc)
-{
+{
u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
u32 left, right, upper, lower, hslen, vslen, sync, vmode;
u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
u32 pix_width, dp_pix_width, dp_chain_mask;
-
+
/* input */
xres = var->xres;
yres = var->yres;
@@ -877,9 +877,9 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
lower = var->lower_margin;
hslen = var->hsync_len;
vslen = var->vsync_len;
- sync = var->sync;
+ sync = var->sync;
vmode = var->vmode;
-
+
/* convert (and round up) and validate */
xres = (xres+7) & ~7;
xoffset = (xoffset+7) & ~7;
@@ -887,7 +887,7 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
if (vxres < xres+xoffset)
vxres = xres+xoffset;
h_disp = xres/8-1;
- if (h_disp > 0xff)
+ if (h_disp > 0xff)
FAIL("h_disp too large");
h_sync_strt = h_disp+(right/8);
if (h_sync_strt > 0x1ff)
@@ -924,7 +924,7 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
pix_width = CRTC_PIX_WIDTH_8BPP;
dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
dp_chain_mask = 0x8080;
- }
+ }
#if SUPPORT_8_BPP_ABOVE==1
else if (bpp <= 16) {
bpp = 16;
@@ -943,7 +943,7 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
BYTE_ORDER_LSB_TO_MSB;
dp_chain_mask = 0x8080;
- }
+ }
#endif
else
FAIL("invalid bpp");
@@ -1123,7 +1123,7 @@ static int encode_fix(struct fb_fix_screeninfo *fix,
fix->smem_start = info->frame_buffer;
fix->smem_len = (u32)info->total_vram;
- /*
+ /*
* Reg Block 0 (CT-compatible block) is at ati_regbase_phys
* Reg Block 1 (multimedia extensions) is at ati_regbase_phys-0x400
*/
@@ -1158,11 +1158,11 @@ static int encode_fix(struct fb_fix_screeninfo *fix,
#endif
/*
* Set the User Defined Part of the Display
- */
-#if PLL_CRTC_DECODE==1
+ */
+#if PLL_CRTC_DECODE==1
static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
struct fb_info *fb)
-{
+{
struct fb_info_aty *info = (struct fb_info_aty *)fb;
struct atyfb_par par;
#if 0
@@ -1171,8 +1171,8 @@ static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
#endif
int err;
int activate = var->activate;
-
-#if 0
+
+#if 0
if (con >= 0)
display = &fb_display[con];
else
@@ -1180,13 +1180,13 @@ static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
#if 0
display = fb->disp; /* used during initialization */
#endif
-
+
if ((err = atyfb_decode_var(var, &par, info)))
return err;
-
+
atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
-
-#if 0
+
+#if 0
printk(BIOS_INFO, "atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
#endif
@@ -1262,7 +1262,7 @@ static void atyfb_set_par(const struct atyfb_par *par,
#if PLL_CRTC_DECODE==1
info->current_par = *par;
-#endif
+#endif
if (info->blitter_may_be_busy)
wait_for_idle(info);
@@ -1344,7 +1344,7 @@ static void atyfb_set_par(const struct atyfb_par *par,
}
#if 0
-static u16 red2[] = {
+static u16 red2[] = {
0x0000, 0xaaaa
};
static u16 green2[] = {
@@ -1356,14 +1356,14 @@ static u16 blue2[] = {
static u16 red4[] = {
0x0000, 0xaaaa, 0x5555, 0xffff
-};
+};
static u16 green4[] = {
0x0000, 0xaaaa, 0x5555, 0xffff
-};
+};
static u16 blue4[] = {
0x0000, 0xaaaa, 0x5555, 0xffff
-};
-
+};
+
static u16 red8[] = {
0x0000, 0x0000, 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa
};
@@ -1405,12 +1405,12 @@ static struct fb_cmap default_16_colors = {
static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
u_int transp, struct fb_info_aty *info)
-{
+{
int i, scale;
-
+
if (regno > 255)
return 1;
- red >>= 8;
+ red >>= 8;
green >>= 8;
blue >>= 8;
#if 0
@@ -1418,7 +1418,7 @@ static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
info->palette[regno].red = red;
info->palette[regno].green = green;
info->palette[regno].blue = blue;
-#endif
+#endif
i = aty_ld_8(DAC_CNTL, info) & 0xfc;
if (M64_HAS(EXTRA_BRIGHT))
i |= 0x2; /*DAC_CNTL|0x2 turns off the extra brightness for gt*/
@@ -1440,11 +1440,11 @@ int fb_set_cmap(struct fb_cmap *cmap, int kspc,
int (*setcolreg)(u_int, u_int, u_int, u_int, u_int,
struct fb_info_aty *),
struct fb_info_aty *info)
-{
+{
int i, start;
u16 *red, *green, *blue, *transp;
u_int hred, hgreen, hblue, htransp;
-
+
red = cmap->red;
green = cmap->green;
blue = cmap->blue;
@@ -1480,13 +1480,13 @@ struct fb_cmap *fb_default_cmap(int len)
return &default_8_colors;
#endif
return &default_16_colors;
-}
+}
static void do_install_cmap(int con, struct fb_info_aty *info)
{
#if PLL_CRTC_DECODE==1
int size = info->current_par.crtc.bpp == 16 ? 32 : 256;
-#else
+#else
int size = 256;
#endif
fb_set_cmap(fb_default_cmap(size), 1, atyfb_setcolreg, info);