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authorChristian Walter <christian.walter@9elements.com>2019-07-16 20:07:36 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2019-08-06 12:08:21 +0000
commit54226819429bb3d34b4914a69713046c52e03973 (patch)
tree093a914cc29fade3800dd8c4b54fcf2847e8d583 /src/drivers/crb/tis.c
parent0bd84ed25066fc28d3a0750d429a29c64bfb955d (diff)
downloadcoreboot-54226819429bb3d34b4914a69713046c52e03973.tar.xz
drivers/crb: Add support for PTT
When we use Intel Platform Trust Technologies, we need to verify that the enable bit is set before we use the integrated TPM. Change-Id: I3b262a5d5253648fb96fb1fd9ba3995f92755bb1 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/drivers/crb/tis.c')
-rw-r--r--src/drivers/crb/tis.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/drivers/crb/tis.c b/src/drivers/crb/tis.c
index c110151766..94bfb9ef15 100644
--- a/src/drivers/crb/tis.c
+++ b/src/drivers/crb/tis.c
@@ -16,6 +16,7 @@
#include <security/tpm/tis.h>
#include <arch/acpigen.h>
#include <device/device.h>
+#include <drivers/intel/ptt/ptt.h>
#include "tpm.h"
#include "chip.h"
@@ -49,6 +50,14 @@ int tis_open(void)
return -1;
}
+ if (CONFIG(HAVE_INTEL_PTT)) {
+ if (!ptt_active()) {
+ printk(BIOS_ERR, "%s: Intel PTT is not active.\n", __func__);
+ return -1;
+ }
+ printk(BIOS_DEBUG, "%s: Intel PTT is active.\n", __func__);
+ }
+
return 0;
}