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authorDuncan Laurie <dlaurie@chromium.org>2016-09-07 10:52:12 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-09-08 16:24:08 +0200
commit1ca196841ac4db46d8d9c3c55004c3e9ee3c8844 (patch)
tree75c49bdb3430a4fb60a82201399b7d7ed53b54d0 /src/drivers/i2c/tpm/tis.c
parent7fbdad80fd439a8afb04e20bd67c8c5fe766dc1a (diff)
downloadcoreboot-1ca196841ac4db46d8d9c3c55004c3e9ee3c8844.tar.xz
drivers/i2c/tpm: Fix early TPM probe
The early TPM probe was done directly in tis.c ignoring the lower layer that provides appropriate access to the chip. Move this into a tpm_vendor_probe() function so it can use iic_tpm_read() with all of the built-in delays and semantics instead of calling i2c_readb() directly from the wrong layer. This fixes early init failures that were seen with the cr50 i2c tpm on the reef mainboard. Change-Id: I9bb3b820d10f6e2ea24c57b90cf0edc813cdc7e0 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/16527 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/drivers/i2c/tpm/tis.c')
-rw-r--r--src/drivers/i2c/tpm/tis.c35
1 files changed, 2 insertions, 33 deletions
diff --git a/src/drivers/i2c/tpm/tis.c b/src/drivers/i2c/tpm/tis.c
index ce0de8953b..fea5145ad2 100644
--- a/src/drivers/i2c/tpm/tis.c
+++ b/src/drivers/i2c/tpm/tis.c
@@ -31,7 +31,6 @@ static struct tpm_chip g_chip CAR_GLOBAL;
#define TPM_CMD_COUNT_BYTE 2
#define TPM_CMD_ORDINAL_BYTE 6
-#define TPM_VALID_STATUS (1 << 7)
int tis_open(void)
{
@@ -69,38 +68,8 @@ int tis_close(void)
int tis_init(void)
{
- int bus = CONFIG_DRIVER_TPM_I2C_BUS;
- int chip = CONFIG_DRIVER_TPM_I2C_ADDR;
- struct stopwatch sw;
- uint8_t buf = 0;
- int ret;
- long sw_run_duration = 750;
-
- /*
- * Probe TPM. Check if the TPM_ACCESS register's ValidSts bit is set(1)
- * If the bit remains clear(0) then claim that init has failed.
- */
- stopwatch_init_msecs_expire(&sw, sw_run_duration);
- do {
- ret = i2c_readb(bus, chip, 0, &buf);
- if (!ret && (buf & TPM_VALID_STATUS)) {
- sw_run_duration = stopwatch_duration_msecs(&sw);
- break;
- }
- } while (!stopwatch_expired(&sw));
-
- printk(BIOS_INFO,
- "%s: ValidSts bit %s(%d) in TPM_ACCESS register after %ld ms\n",
- __func__, (buf & TPM_VALID_STATUS) ? "set" : "clear",
- (buf & TPM_VALID_STATUS) >> 7, sw_run_duration);
-
- /*
- * Claim failure if the ValidSts (bit 7) is clear.
- */
- if (!(buf & TPM_VALID_STATUS))
- return -1;
-
- return 0;
+ return tpm_vendor_probe(CONFIG_DRIVER_TPM_I2C_BUS,
+ CONFIG_DRIVER_TPM_I2C_ADDR);
}
static ssize_t tpm_transmit(const uint8_t *buf, size_t bufsiz)