diff options
author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-02-21 01:45:35 -0600 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-26 06:20:07 +0100 |
commit | d3e31be8c5509862b0e28ac49286c957a79faf33 (patch) | |
tree | 238ccbca76bb5fe6b5283a73456755e0ca9d2215 /src/drivers/i2c/w83793/w83793.c | |
parent | 1ecc8af5ce440003f32a66d3e0047150a7d4beab (diff) | |
download | coreboot-d3e31be8c5509862b0e28ac49286c957a79faf33.tar.xz |
drivers/i2c/w83793: Use devicetree.cb to set additional values
This allows devicetree.cb to set:
Minimum PWM values
Temperature sensor source
Voltage sensor high/low limits
Fan pin routing
Default PWM values
Manual PWM values per-fan
Change-Id: I3a321406a26ae01a121289d24b41c9f988dd6f30
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8502
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/drivers/i2c/w83793/w83793.c')
-rw-r--r-- | src/drivers/i2c/w83793/w83793.c | 119 |
1 files changed, 106 insertions, 13 deletions
diff --git a/src/drivers/i2c/w83793/w83793.c b/src/drivers/i2c/w83793/w83793.c index 5b17867dd7..18052f1b36 100644 --- a/src/drivers/i2c/w83793/w83793.c +++ b/src/drivers/i2c/w83793/w83793.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * Copyright (C) 2012 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify @@ -93,6 +94,31 @@ static int w83793_tr_fan_level(struct device *dev, int fan, const char *level) return 0; } +static uint8_t millivolts_to_limit_value_type1(int millivolts) +{ + /* Datasheet v1.4 page 64 (VCoreA, VCoreB, Vtt Limit) */ + return ((millivolts * 125) / 1000); +} + +static uint8_t millivolts_to_limit_value_type2(int millivolts) +{ + /* Datasheet v1.4 page 64 (VSEN1, VEN2, VSEN3) */ + return ((millivolts * 625) / 10000); +} + +static uint8_t millivolts_to_limit_value_type3(int millivolts) +{ + /* Datasheet v1.4 page 64 (5VDD, 5VSB) */ + return ((((millivolts * 10) + 1500) * 417) / 10000); +} + +static uint8_t fan_pct_to_cfg_val(uint8_t percent) +{ + uint8_t cfg = (((unsigned int)percent * 10000) / 15873); + if (cfg > 0x3f) + cfg = 0x3f; + return cfg; +} static void w83793_init(struct device *dev) { @@ -121,8 +147,11 @@ static void w83793_init(struct device *dev) /* FANIN_Ctrl */ smbus_write_byte(dev, 0x5c, config->fanin); - /* Temperature reported by PECI */ - smbus_write_byte(dev, 0x5e, 0xff); + /* FANIN_Sel */ + smbus_write_byte(dev, 0x5d, config->fanin_sel); + + /* Temperature source */ + smbus_write_byte(dev, 0x5e, config->td_mode_select); /* TR monitor enable */ smbus_write_byte(dev, 0x5f, config->tr_enable); /* PECI Agent configuration */ @@ -135,12 +164,63 @@ static void w83793_init(struct device *dev) /* PECI Reportstyle */ smbus_write_byte(dev, 0xd5, 0x00); - for (i = 0; i < 9; i++) + /* Voltage high/low limits */ + smbus_write_byte(dev, 0x60, millivolts_to_limit_value_type1(config->vcorea_high_limit_mv)); + smbus_write_byte(dev, 0x61, millivolts_to_limit_value_type1(config->vcorea_low_limit_mv)); + smbus_write_byte(dev, 0x62, millivolts_to_limit_value_type1(config->vcoreb_high_limit_mv)); + smbus_write_byte(dev, 0x63, millivolts_to_limit_value_type1(config->vcoreb_low_limit_mv)); + smbus_write_byte(dev, 0x64, millivolts_to_limit_value_type1(config->vtt_high_limit_mv)); + smbus_write_byte(dev, 0x65, millivolts_to_limit_value_type1(config->vtt_low_limit_mv)); + smbus_write_byte(dev, 0x6a, millivolts_to_limit_value_type2(config->vsen1_high_limit_mv)); + smbus_write_byte(dev, 0x6b, millivolts_to_limit_value_type2(config->vsen1_low_limit_mv)); + smbus_write_byte(dev, 0x6c, millivolts_to_limit_value_type2(config->vsen2_high_limit_mv)); + smbus_write_byte(dev, 0x6d, millivolts_to_limit_value_type2(config->vsen2_low_limit_mv)); + smbus_write_byte(dev, 0x6e, millivolts_to_limit_value_type2(config->vsen3_high_limit_mv)); + smbus_write_byte(dev, 0x6f, millivolts_to_limit_value_type2(config->vsen3_low_limit_mv)); + smbus_write_byte(dev, 0x70, millivolts_to_limit_value_type1(config->vsen4_high_limit_mv)); + smbus_write_byte(dev, 0x71, millivolts_to_limit_value_type1(config->vsen4_low_limit_mv)); + smbus_write_byte(dev, 0x72, millivolts_to_limit_value_type3(config->vdd_high_limit_mv)); + smbus_write_byte(dev, 0x73, millivolts_to_limit_value_type3(config->vdd_low_limit_mv)); + smbus_write_byte(dev, 0x74, millivolts_to_limit_value_type3(config->vsb_high_limit_mv)); + smbus_write_byte(dev, 0x75, millivolts_to_limit_value_type3(config->vsb_low_limit_mv)); + smbus_write_byte(dev, 0x76, millivolts_to_limit_value_type2(config->vbat_high_limit_mv)); + smbus_write_byte(dev, 0x77, millivolts_to_limit_value_type2(config->vbat_low_limit_mv)); + + /* Temperature high/low limits */ + smbus_write_byte(dev, 0x78, config->td1_critical_temperature); + smbus_write_byte(dev, 0x79, config->td1_critical_hysteresis); + smbus_write_byte(dev, 0x7a, config->td1_warning_temperature); + smbus_write_byte(dev, 0x7b, config->td1_warning_hysteresis); + smbus_write_byte(dev, 0x7c, config->td2_critical_temperature); + smbus_write_byte(dev, 0x7d, config->td2_critical_hysteresis); + smbus_write_byte(dev, 0x7e, config->td2_warning_temperature); + smbus_write_byte(dev, 0x7f, config->td2_warning_hysteresis); + smbus_write_byte(dev, 0x80, config->td3_critical_temperature); + smbus_write_byte(dev, 0x81, config->td3_critical_hysteresis); + smbus_write_byte(dev, 0x82, config->td3_warning_temperature); + smbus_write_byte(dev, 0x83, config->td3_warning_hysteresis); + smbus_write_byte(dev, 0x84, config->td4_critical_temperature); + smbus_write_byte(dev, 0x85, config->td4_critical_hysteresis); + smbus_write_byte(dev, 0x86, config->td4_warning_temperature); + smbus_write_byte(dev, 0x87, config->td4_warning_hysteresis); + smbus_write_byte(dev, 0x88, config->tr1_critical_temperature); + smbus_write_byte(dev, 0x89, config->tr1_critical_hysteresis); + smbus_write_byte(dev, 0x8a, config->tr1_warning_temperature); + smbus_write_byte(dev, 0x8b, config->tr1_warning_hysteresis); + smbus_write_byte(dev, 0x8c, config->tr2_critical_temperature); + smbus_write_byte(dev, 0x8d, config->tr2_critical_hysteresis); + smbus_write_byte(dev, 0x8e, config->tr2_warning_temperature); + smbus_write_byte(dev, 0x8f, config->tr2_warning_hysteresis); + + /* Set minimum FAN speeds before alarms will be set */ + for (i = 0; i < config->first_valid_fan_number; i++) + w83793_fan_limit(dev, i, 0x0); + for (i = config->first_valid_fan_number; i < 12; i++) w83793_fan_limit(dev, i, 0x768); /* Fan output style control */ - smbus_write_byte(dev, 0xb0, 0x00); - smbus_write_byte(dev, 0xb1, 0x00); + smbus_write_byte(dev, 0xb0, config->fanctrl1); + smbus_write_byte(dev, 0xb1, config->fanctrl2); /* FAN Uptime */ smbus_write_byte(dev, 0xc3, 0x02); @@ -157,6 +237,19 @@ static void w83793_init(struct device *dev) smbus_write_byte(dev, 0xaa, 0xf9); smbus_write_byte(dev, 0xab, 0xf9); + /* Default FAN speed */ + smbus_write_byte(dev, 0xb2, fan_pct_to_cfg_val(config->default_speed)); + + /* Manual FAN speeds */ + smbus_write_byte(dev, 0xb3, fan_pct_to_cfg_val(config->fan1_duty)); + smbus_write_byte(dev, 0xb4, fan_pct_to_cfg_val(config->fan2_duty)); + smbus_write_byte(dev, 0xb5, fan_pct_to_cfg_val(config->fan3_duty)); + smbus_write_byte(dev, 0xb6, fan_pct_to_cfg_val(config->fan4_duty)); + smbus_write_byte(dev, 0xb7, fan_pct_to_cfg_val(config->fan5_duty)); + smbus_write_byte(dev, 0xb8, fan_pct_to_cfg_val(config->fan6_duty)); + smbus_write_byte(dev, 0xb9, fan_pct_to_cfg_val(config->fan7_duty)); + smbus_write_byte(dev, 0xba, fan_pct_to_cfg_val(config->fan8_duty)); + /* BANK 2 */ smbus_write_byte(dev, 0x00, 0x02); @@ -177,14 +270,14 @@ static void w83793_init(struct device *dev) smbus_write_byte(dev, 0x09, 0xaa); /* FanNonStop */ - smbus_write_byte(dev, 0x18, 0x1d); - smbus_write_byte(dev, 0x19, 0x04); - smbus_write_byte(dev, 0x1a, 0x04); - smbus_write_byte(dev, 0x1b, 0x04); - smbus_write_byte(dev, 0x1c, 0x04); - smbus_write_byte(dev, 0x1d, 0x04); - smbus_write_byte(dev, 0x1e, 0x04); - smbus_write_byte(dev, 0x1f, 0x04); + smbus_write_byte(dev, 0x18, fan_pct_to_cfg_val(config->fan1_nonstop)); + smbus_write_byte(dev, 0x19, fan_pct_to_cfg_val(config->fan2_nonstop)); + smbus_write_byte(dev, 0x1a, fan_pct_to_cfg_val(config->fan3_nonstop)); + smbus_write_byte(dev, 0x1b, fan_pct_to_cfg_val(config->fan4_nonstop)); + smbus_write_byte(dev, 0x1c, fan_pct_to_cfg_val(config->fan5_nonstop)); + smbus_write_byte(dev, 0x1d, fan_pct_to_cfg_val(config->fan6_nonstop)); + smbus_write_byte(dev, 0x1e, fan_pct_to_cfg_val(config->fan7_nonstop)); + smbus_write_byte(dev, 0x1f, fan_pct_to_cfg_val(config->fan8_nonstop)); /* FanStart */ smbus_write_byte(dev, 0x20, 0x08); |