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| author | Marc Jones <marc.jones@se-eng.com> | 2015-04-22 23:16:31 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-24 00:37:37 +0200 |
| commit | 786879777a70cb82c94588e6d14c8fdd18ab4345 (patch) | |
| tree | a3dea1ee11739a00b63ffead17d7cd29078a70b8 /src/drivers/intel/fsp1_0/Makefile.inc | |
| parent | be34797e4c2a5b74bb8fcbbe9e4301b471d185e5 (diff) | |
| download | coreboot-786879777a70cb82c94588e6d14c8fdd18ab4345.tar.xz | |
fsp: Move fsp to fsp1_0
Prepare for FSP 1.1 integration by moving the FSP to a FSP 1.0 specific
directory. See follow-on patches for sharing of common code.
Change-Id: Ic58cb4074c65b91d119909132a012876d7ee7b74
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/9970
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp1_0/Makefile.inc')
| -rw-r--r-- | src/drivers/intel/fsp1_0/Makefile.inc | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_0/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc new file mode 100644 index 0000000000..4931cb7a7e --- /dev/null +++ b/src/drivers/intel/fsp1_0/Makefile.inc @@ -0,0 +1,49 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2014 Sage Electronic Engineering, LLC. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +ramstage-y += fsp_util.c hob.c +romstage-y += fsp_util.c hob.c + +ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c +romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c + +CPPFLAGS_common += -Isrc/drivers/intel/fsp1_0 + +ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y) +cpu_incs += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc +endif + +ifeq ($(CONFIG_HAVE_FSP_BIN),y) +cbfs-files-y += fsp.bin +fsp.bin-file := $(call strip_quotes,$(CONFIG_FSP_FILE)) +fsp.bin-position := $(CONFIG_FSP_LOC) +fsp.bin-type := fsp +endif + +ifeq ($(CONFIG_ENABLE_MRC_CACHE),y) +$(obj)/mrc.cache: + dd if=/dev/zero count=1 \ + bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \ + tr '\000' '\377' > $@ + +cbfs-files-y += mrc.cache +mrc.cache-file := $(obj)/mrc.cache +mrc.cache-position := $(CONFIG_MRC_CACHE_LOC) +mrc.cache-type := mrc_cache +endif |