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author | Martin Roth <gaumless@gmail.com> | 2015-04-16 21:20:34 -0600 |
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committer | Martin Roth <gaumless@gmail.com> | 2015-04-28 20:50:03 +0200 |
commit | 562d6f30a0745b3da4c61974f8ac1b529dac9d80 (patch) | |
tree | fed954e864a211d8ecfcdfcadf105f7d2a4a3fac /src/drivers/intel/fsp1_0 | |
parent | ceae968e2cc3d9318c70e34a5424080f9f345eea (diff) | |
download | coreboot-562d6f30a0745b3da4c61974f8ac1b529dac9d80.tar.xz |
fsp platforms: consolidate FspNotify calls
Consolidate the FspNotify calls into the FSP driver directory,
using BOOT_STATE_INIT_ENTRY to set up the call times.
Change-Id: I184ab234ebb9dcdeb8eece1537c12d03f227c25e
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/9780
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers/intel/fsp1_0')
-rwxr-xr-x | src/drivers/intel/fsp1_0/fsp_util.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c index ab67147459..3147b67c3e 100755 --- a/src/drivers/intel/fsp1_0/fsp_util.c +++ b/src/drivers/intel/fsp1_0/fsp_util.c @@ -317,6 +317,35 @@ static void find_fsp_hob_update_mrc(void *unused) } } +/** @brief Notify FSP for PostPciEnumeration + * + * @param unused + */ +static void fsp_after_pci_enum(void *unused) +{ + /* This call needs to be done before resource allocation. */ + printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseAfterPciEnumeration)\n"); + FspNotify(EnumInitPhaseAfterPciEnumeration); + printk(BIOS_DEBUG, + "Returned from FspNotify(EnumInitPhaseAfterPciEnumeration)\n"); +} + +/** @brief Notify FSP for ReadyToBoot + * + * @param unused + */ +static void fsp_finalize(void *unused) +{ + printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseReadyToBoot)\n"); + print_fsp_info(); + FspNotify(EnumInitPhaseReadyToBoot); + printk(BIOS_DEBUG, "Returned from FspNotify(EnumInitPhaseReadyToBoot)\n"); +} + +/* Set up for the ramstage FSP calls */ +BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_EXIT, fsp_after_pci_enum, NULL); +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, fsp_finalize, NULL); + /* Update the MRC/fast boot cache as part of the late table writing stage */ BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, find_fsp_hob_update_mrc, NULL); |