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authorFrans Hendriks <fhendriks@eltan.com>2019-06-06 10:07:17 +0200
committerArthur Heymans <arthur@aheymans.xyz>2019-06-12 07:47:13 +0000
commit4e0ec592553fd94e14a239eeb05ba9ccb668b814 (patch)
tree98ed71b9de6a9ca044fbc88284e74aeeff63ded7 /src/drivers/intel/fsp1_1/Makefile.inc
parentba50e4885fd68579ec76a149d28b0b9605381d7e (diff)
downloadcoreboot-4e0ec592553fd94e14a239eeb05ba9ccb668b814.tar.xz
{drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
No C_ENVIRONMENT_BOOTBLOCK support for Braswell is available. Enable support and add required files for the Braswell Bootblock in C. The next changes are made support C_ENVIRONMENT_BOOTBLOCK: - Add car_stage_entry() function bootblock-c_entry() functions. - Specify config DCACHE_BSP_STACK_SIZE and C_ENV_BOOTBLOCK_SIZE. - Add bootblock_c_entry(). - Move init from car_soc_XXX_console_init() to bootblock_soc_XXX_Init() Removed the unused cache_as_ram_main() and weak car_XXX_XXX_console_init() BUG=NA TEST=Booting Embedded Linux on Facebook FBG-1701 Building Google Banos Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29662 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/drivers/intel/fsp1_1/Makefile.inc')
-rw-r--r--src/drivers/intel/fsp1_1/Makefile.inc3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc
index 93f3b59d4b..10877b9482 100644
--- a/src/drivers/intel/fsp1_1/Makefile.inc
+++ b/src/drivers/intel/fsp1_1/Makefile.inc
@@ -21,6 +21,7 @@ verstage-y += fsp_util.c
verstage-$(CONFIG_SEPARATE_VERSTAGE) += verstage.c
bootblock-y += bootblock.c
+bootblock-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += cache_as_ram.S
bootblock-y += fsp_util.c
romstage-y += car.c
@@ -42,8 +43,6 @@ ramstage-$(CONFIG_MMA) += mma_core.c
CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include
-cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_1/cache_as_ram.inc
-
postcar-y += stage_cache.c
ifneq ($(CONFIG_SKIP_FSP_CAR),y)
postcar-y += temp_ram_exit.c