diff options
author | Subrata Banik <subrata.banik@intel.com> | 2016-07-27 05:30:50 +0530 |
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committer | Andrey Petrov <andrey.petrov@intel.com> | 2016-07-28 05:29:46 +0200 |
commit | a90f41bdd71bd3f98c683702f90247e674a50896 (patch) | |
tree | 460f30c32ed03a6ea494a4f155fbdea7359c937a /src/drivers/intel/fsp1_1/bootblock.c | |
parent | 89f6d6079ef88ff20c7da3422d1298d614ed6b5a (diff) | |
download | coreboot-a90f41bdd71bd3f98c683702f90247e674a50896.tar.xz |
intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init
FSP temp ram init was getting called earlier from ROMCC bootblock.
Now with C entry boot block, it is needed to locate FSP header and
call FspTempRamInit.
Hence add fsp 1_1 driver code to locate FSP Temp ram and execute.
BUG=chrome-os-partner:55357
BRANCH=none
TEST=Built kunimitsu and ensure FSP Temp Ram Init return success
Change-Id: If40b267777a8dc5c473d1115b19b98609ff3fd74
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/15787
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp1_1/bootblock.c')
-rw-r--r-- | src/drivers/intel/fsp1_1/bootblock.c | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_1/bootblock.c b/src/drivers/intel/fsp1_1/bootblock.c new file mode 100644 index 0000000000..c0f26d9a72 --- /dev/null +++ b/src/drivers/intel/fsp1_1/bootblock.c @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <fsp/bootblock.h> +#include <fsp/util.h> + +static void fill_temp_ram_init_params(FSP_TEMP_RAM_INIT_PARAMS *params) +{ + params->MicrocodeRegionBase = CONFIG_CPU_MICROCODE_CBFS_LOC; + params->MicrocodeRegionLength = CONFIG_CPU_MICROCODE_CBFS_LEN; + params->CodeRegionBase = 0xFFFFFFFF - CONFIG_ROM_SIZE + 1; + params->CodeRegionLength = CONFIG_ROM_SIZE; +} + +void bootblock_fsp_temp_ram_init(void) +{ + FSP_TEMP_RAM_INIT fsp_temp_ram_init; + FSP_TEMP_RAM_INIT_PARAMS temp_ram_init_params; + FSP_INFO_HEADER *fih; + EFI_STATUS status; + + /* Locate the FSP header */ + fih = find_fsp(CONFIG_FSP_LOC); + /* Check the FSP header */ + if (fih == NULL) + die("FSP_INFO_HEADER not set!\n"); + + fill_temp_ram_init_params(&temp_ram_init_params); + + /* Perform Temp RAM Init */ + printk(BIOS_DEBUG, "Calling FspTempRamInit\n"); + post_code(POST_FSP_TEMP_RAM_INIT); + fsp_temp_ram_init = (FSP_TEMP_RAM_INIT)(fih->ImageBase + + fih->TempRamInitEntryOffset); + status = fsp_temp_ram_init(&temp_ram_init_params); + if (status != FSP_SUCCESS) + die("FspTempRamInit failed. Giving up."); + + printk(BIOS_DEBUG, "FspTempRamInit returned 0x%08x\n", status); +} |