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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-06-16 14:33:30 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-06-24 17:03:49 +0200 |
| commit | 4a8c19cc90464ad215395bd116c9dc95fc682cac (patch) | |
| tree | 3ce82af088b0bbb782d667a531f54641abeb1dfb /src/drivers/intel/fsp1_1/fsp_util.h | |
| parent | bfdf2489f071d8ee1d1c510e503b488526111eb7 (diff) | |
| download | coreboot-4a8c19cc90464ad215395bd116c9dc95fc682cac.tar.xz | |
FSP 1.1: Bring source up-to-date
Use 3rdparty/blobs subdirectory for binary files
Display the MTRRs after TempRamExit and before the MTRR setup
Clear all of the variable MTRRs before the MTRR setup
Define the FSP attributes location and bits
Properly display the FSP_RESERVED_MEMORY_RESOURCE_HOB and the
FSP_BOOTLOADER_TOLUM_HOB.
BRANCH=none
BUG=None
TEST=Build and run on cyan
Change-Id: I788a5f1e7676b1a06c1bcd66ddbd0a2249cad47c
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10589
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers/intel/fsp1_1/fsp_util.h')
| -rw-r--r-- | src/drivers/intel/fsp1_1/fsp_util.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_1/fsp_util.h b/src/drivers/intel/fsp1_1/fsp_util.h index 38fa86211b..618317ba69 100644 --- a/src/drivers/intel/fsp1_1/fsp_util.h +++ b/src/drivers/intel/fsp1_1/fsp_util.h @@ -37,7 +37,7 @@ #define GetFirstGuidHob get_first_guid_hob /* Include the EDK2 headers */ -#include <chipset_fsp_util.h> +#include <soc/chipset_fsp_util.h> #if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE) int save_mrc_data(void *hob_start); @@ -104,6 +104,8 @@ void update_mrc_cache(void *unused); #define FSP_IMAGE_SIG_LOC 0 #define FSP_IMAGE_ID_LOC 16 #define FSP_IMAGE_BASE_LOC 28 +#define FSP_IMAGE_ATTRIBUTE_LOC 32 +#define GRAPHICS_SUPPORT_BIT (1 << 0) #define FSP_SIG 0x48505346 /* 'FSPH' */ |