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| author | Teo Boon Tiong <boon.tiong.teo@intel.com> | 2016-12-28 18:56:26 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-01-19 08:50:44 +0100 |
| commit | d8e34b2c44605d2eb6ed1a955148ac24b9d0cd2e (patch) | |
| tree | d559fb2824ad00b29e2dbc04523c6e1cec167860 /src/drivers/intel/fsp1_1/include | |
| parent | 951ec96f17100692daed8c5316ffa13a7ed387d9 (diff) | |
| download | coreboot-d8e34b2c44605d2eb6ed1a955148ac24b9d0cd2e.tar.xz | |
driver/intel/fsp1_1: Fix boot failure for non-verstage case
Currently car_stage_entry is defined only in romstage_after_verstage and
as a result when SEPARATE_VERSTAGE is not selected, there is no
entry point into romstage and romstage will not be started at all.
The solution is move out romstage_after_verstage.S from fsp1.1 driver
to skylake/romstage. And add CONFIG_PLATFORM_USES_FSP1_1 to fix the
build and boot issue with this change.
Besides that, rename the romstage_after_verstage to romstage_c_entry
in more appropriate naming convention after this fix.
Tested on SkyLake Saddle Brook (FSP 1.1) and KabyLake Rvp11 (FSP 2.0),
romstage can be started successfully.
Change-Id: I1cd2cf5655fdff6e23b7b76c3974e7dfd3835efd
Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Reviewed-on: https://review.coreboot.org/17976
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/drivers/intel/fsp1_1/include')
| -rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/car.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/car.h b/src/drivers/intel/fsp1_1/include/fsp/car.h index 88dca9a0c5..5214d73b29 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/car.h +++ b/src/drivers/intel/fsp1_1/include/fsp/car.h @@ -32,7 +32,7 @@ struct cache_as_ram_params { /* Entry points from the cache-as-ram assembly code. */ asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params); asmlinkage void after_cache_as_ram(void *chipset_context); -asmlinkage void *romstage_after_verstage(void); +asmlinkage void *romstage_c_entry(void); /* Per stage calls from the above two functions. The void * return from * cache_as_ram_stage_main() is the stack pointer to use in RAM after * exiting cache-as-ram mode. */ |