diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-13 23:09:52 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 08:31:09 +0200 |
| commit | 932e09d168ba180ee0a17319c1e9cd73009a7adb (patch) | |
| tree | 0109419369f1f8d755ade853f7510580fd36bd7f /src/drivers/intel/fsp1_1/raminit.c | |
| parent | 9fe0ff2f832dc58bfbb51032a7565c75e24a36c1 (diff) | |
| download | coreboot-932e09d168ba180ee0a17319c1e9cd73009a7adb.tar.xz | |
drivers/intel/fsp1_1: align on using ACPI_Sx definitions
The SLEEP_STATE_x definitions in the chipsets utilizing
FSP 1.1. driver have the exact same values as the ACPI_Sx
definitions. The chipsets will be moved over subsequently,
but updating this first allows the per-chipset patches
to be isolated.
BUG=chrome-os-partner:54977
Change-Id: I383a9a732ef68bf2276f6149ffa5360bcdfb70b3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15665
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1/raminit.c')
| -rw-r--r-- | src/drivers/intel/fsp1_1/raminit.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index e505b93a26..3eee2da4e5 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <arch/acpi.h> #include <cbmem.h> #include <console/console.h> #include <fsp/memmap.h> @@ -80,7 +81,7 @@ void raminit(struct romstage_params *params) /* Zero fill RT Buffer data and start populating fields. */ memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer)); pei_ptr = params->pei_data; - if (pei_ptr->boot_mode == SLEEP_STATE_S3) { + if (pei_ptr->boot_mode == ACPI_S3) { fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME; } else if (pei_ptr->saved_data != NULL) { fsp_rt_common_buffer.BootMode = @@ -156,7 +157,7 @@ void raminit(struct romstage_params *params) /* Migrate CAR data */ printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top()); - if (pei_ptr->boot_mode != SLEEP_STATE_S3) { + if (pei_ptr->boot_mode != ACPI_S3) { cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, fsp_reserved_bytes); } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |