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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-11-07 15:24:37 +0100 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-12-04 07:11:56 +0000 |
| commit | fb444b0d201e39a91c28531892fd50571ada2ad4 (patch) | |
| tree | 0324f44f39a6bcd18a7bbc8599f628352cb7a7c9 /src/drivers/intel/fsp1_1 | |
| parent | e736015fffc973ccbd6de54751e312a1fda387dc (diff) | |
| download | coreboot-fb444b0d201e39a91c28531892fd50571ada2ad4.tar.xz | |
mb/opencellular/elgon: Enable write protection
* Verify the flash write protection on each boot
* Program non-volatile write protection on first boot
Tested using I715791b8ae5d1db1ef587321ae5c9daa10eb7dbc.
The bootblock is write-protected as long as the #WP pin is asserted low:
* Reprogramming of the status register fails.
* Trying to write to WP_RO region fails.
Programming the WP_RO is only possible if #WP pin is high.
Change-Id: I6a940c69ecb1dfd9704b2101c263570bebc5540e
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/29532
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1')
0 files changed, 0 insertions, 0 deletions