printf: Automatically prefix %p with 0x

According to the POSIX standard, %p is supposed to print a pointer "as
if by %#x", meaning the "0x" prefix should automatically be prepended.
All other implementations out there (glibc, Linux, even libpayload) do
this, so we should make coreboot match. This patch changes vtxprintf()
accordingly and removes any explicit instances of "0x%p" from existing
format strings.

How to handle zero padding is less clear: the official POSIX definition
above technically says there should be no automatic zero padding, but in
practice most other implementations seem to do it and I assume most
programmers would prefer it. The way chosen here is to always zero-pad
to 32 bits, even on a 64-bit system. The rationale for this is that even
on 64-bit systems, coreboot always avoids using any memory above 4GB for
itself, so in practice all pointers should fit in that range and padding
everything to 64 bits would just hurt readability. Padding it this way
also helps pointers that do exceed 4GB (e.g. prints from MMU config on
some arm64 systems) stand out better from the others.

Change-Id: I0171b52f7288abb40e3fc3c8b874aee14b9bdcd6
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Guckian

5 files changed, 21 insertions, 21 deletions

diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c
index 2889f3f6fc..b1075ff2b5 100644
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ b/src/drivers/intel/fsp1_1/fsp_util.c
@@ -102,22 +102,22 @@ void print_fsp_info(FSP_INFO_HEADER *fsp_header)
 			(u8)(fsp_header->ImageRevision  & 0xff));
 #if CONFIG(DISPLAY_FSP_ENTRY_POINTS)
 	printk(BIOS_SPEW, "FSP Entry Points:\n");
-	printk(BIOS_SPEW, "    0x%p: Image Base\n", fsp_base);
-	printk(BIOS_SPEW, "    0x%p: TempRamInit\n",
+	printk(BIOS_SPEW, "    %p: Image Base\n", fsp_base);
+	printk(BIOS_SPEW, "    %p: TempRamInit\n",
 		&fsp_base[fsp_header->TempRamInitEntryOffset]);
-	printk(BIOS_SPEW, "    0x%p: FspInit\n",
+	printk(BIOS_SPEW, "    %p: FspInit\n",
 		&fsp_base[fsp_header->FspInitEntryOffset]);
 	if (fsp_header->HeaderRevision >= FSP_HEADER_REVISION_2) {
-		printk(BIOS_SPEW, "    0x%p: MemoryInit\n",
+		printk(BIOS_SPEW, "    %p: MemoryInit\n",
 			&fsp_base[fsp_header->FspMemoryInitEntryOffset]);
-		printk(BIOS_SPEW, "    0x%p: TempRamExit\n",
+		printk(BIOS_SPEW, "    %p: TempRamExit\n",
 			&fsp_base[fsp_header->TempRamExitEntryOffset]);
-		printk(BIOS_SPEW, "    0x%p: SiliconInit\n",
+		printk(BIOS_SPEW, "    %p: SiliconInit\n",
 			&fsp_base[fsp_header->FspSiliconInitEntryOffset]);
 	}
-	printk(BIOS_SPEW, "    0x%p: NotifyPhase\n",
+	printk(BIOS_SPEW, "    %p: NotifyPhase\n",
 		&fsp_base[fsp_header->NotifyPhaseEntryOffset]);
-	printk(BIOS_SPEW, "    0x%p: Image End\n",
+	printk(BIOS_SPEW, "    %p: Image End\n",
 			&fsp_base[fsp_header->ImageSize]);
 #endif
 }
diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c
index d6878e3780..679cdf8032 100644
--- a/src/drivers/intel/fsp1_1/hob.c
+++ b/src/drivers/intel/fsp1_1/hob.c
@@ -282,7 +282,7 @@ void print_hob_type_structure(u16 hob_type, void *hob_list_ptr)
 	 * the end of the HOB list
 	 */
 	printk(BIOS_DEBUG, "\n=== FSP HOB Data Structure ===\n");
-	printk(BIOS_DEBUG, "0x%p: hob_list_ptr\n", hob_list_ptr);
+	printk(BIOS_DEBUG, "%p: hob_list_ptr\n", hob_list_ptr);
 	do {
 		EFI_HOB_GENERIC_HEADER *current_header_ptr =
 			(EFI_HOB_GENERIC_HEADER *)current_hob;
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c
index 59a60cfb83..208ebb5a58 100644
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ b/src/drivers/intel/fsp1_1/raminit.c
@@ -66,10 +66,10 @@ void raminit(struct romstage_params *params)
 	fsp_header = params->chipset_context;
 	vpd_ptr = (VPD_DATA_REGION *)(fsp_header->CfgRegionOffset +
 					fsp_header->ImageBase);
-	printk(BIOS_DEBUG, "VPD Data: 0x%p\n", vpd_ptr);
+	printk(BIOS_DEBUG, "VPD Data: %p\n", vpd_ptr);
 	upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
 					fsp_header->ImageBase);
-	printk(BIOS_DEBUG, "UPD Data: 0x%p\n", upd_ptr);
+	printk(BIOS_DEBUG, "UPD Data: %p\n", upd_ptr);
 	original_params = (void *)((u8 *)upd_ptr +
 		upd_ptr->MemoryInitUpdOffset);
 	memcpy(&memory_init_params, original_params,
@@ -110,12 +110,12 @@ void raminit(struct romstage_params *params)
 	/* Call FspMemoryInit to initialize RAM */
 	fsp_memory_init = (FSP_MEMORY_INIT)(fsp_header->ImageBase
 		+ fsp_header->FspMemoryInitEntryOffset);
-	printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_memory_init);
-	printk(BIOS_SPEW, "    0x%p: NvsBufferPtr\n",
+	printk(BIOS_DEBUG, "Calling FspMemoryInit: %p\n", fsp_memory_init);
+	printk(BIOS_SPEW, "    %p: NvsBufferPtr\n",
 		fsp_memory_init_params.NvsBufferPtr);
-	printk(BIOS_SPEW, "    0x%p: RtBufferPtr\n",
+	printk(BIOS_SPEW, "    %p: RtBufferPtr\n",
 		fsp_memory_init_params.RtBufferPtr);
-	printk(BIOS_SPEW, "    0x%p: HobListPtr\n",
+	printk(BIOS_SPEW, "    %p: HobListPtr\n",
 		fsp_memory_init_params.HobListPtr);
 
 	timestamp_add_now(TS_FSP_MEMORY_INIT_START);
@@ -151,7 +151,7 @@ void raminit(struct romstage_params *params)
 	}
 
 	/* Migrate CAR data */
-	printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top());
+	printk(BIOS_DEBUG, "%p: cbmem_top\n", cbmem_top());
 	if (!s3wake) {
 		cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
 			fsp_reserved_bytes);
@@ -216,7 +216,7 @@ void raminit(struct romstage_params *params)
 
 	/* Get the address of the CBMEM region for the FSP reserved memory */
 	fsp_reserved_memory_area = cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY);
-	printk(BIOS_DEBUG, "0x%p: fsp_reserved_memory_area\n",
+	printk(BIOS_DEBUG, "%p: fsp_reserved_memory_area\n",
 		fsp_reserved_memory_area);
 
 	/* Verify the order of CBMEM root and FSP memory */
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 70bedc50af..9ecdfd658a 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -81,10 +81,10 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 	/* Initialize the UPD values */
 	vpd_ptr = (VPD_DATA_REGION *)(fsp_info_header->CfgRegionOffset +
 					fsp_info_header->ImageBase);
-	printk(BIOS_DEBUG, "0x%p: VPD Data\n", vpd_ptr);
+	printk(BIOS_DEBUG, "%p: VPD Data\n", vpd_ptr);
 	upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
 					fsp_info_header->ImageBase);
-	printk(BIOS_DEBUG, "0x%p: UPD Data\n", upd_ptr);
+	printk(BIOS_DEBUG, "%p: UPD Data\n", upd_ptr);
 	original_params = (void *)((u8 *)upd_ptr +
 		upd_ptr->SiliconInitUpdOffset);
 	memcpy(&silicon_init_params, original_params,
@@ -114,7 +114,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 	fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase
 		+ fsp_info_header->FspSiliconInitEntryOffset);
 	timestamp_add_now(TS_FSP_SILICON_INIT_START);
-	printk(BIOS_DEBUG, "Calling FspSiliconInit(0x%p) at 0x%p\n",
+	printk(BIOS_DEBUG, "Calling FspSiliconInit(%p) at %p\n",
 		&silicon_init_params, fsp_silicon_init);
 	post_code(POST_FSP_SILICON_INIT);
 	status = fsp_silicon_init(&silicon_init_params);
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index d441ca7008..95148f744b 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -220,7 +220,7 @@ __weak void mainboard_save_dimm_info(
 	 * table 17
 	 */
 	mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
-	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
+	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n", mem_info);
 	if (mem_info == NULL)
 		return;
 	memset(mem_info, 0, sizeof(*mem_info));