summaryrefslogtreecommitdiff
path: root/src/drivers/intel/fsp1_1
diff options
context:
space:
mode:
authorNaresh G Solanki <naresh.solanki@intel.com>2016-10-24 13:01:28 +0530
committerAaron Durbin <adurbin@chromium.org>2016-10-27 17:01:46 +0200
commitd5353e36483daef462fd37e47aa4c0524f868ace (patch)
tree7618ffa50ae2700fc8ec630b0fab2674f9b7d66d /src/drivers/intel/fsp1_1
parent6ea1500e48aa86ca0ae5da2227a65a3e5b5420db (diff)
downloadcoreboot-d5353e36483daef462fd37e47aa4c0524f868ace.tar.xz
driver/intel/fsp2_0: Reset on invalid stage cache.
Add config in fsp 2.0/1.1 driver to reset if ramstage stage cache is invalid during S3 resume. Change-Id: I83fe76957c061f20e9afb308e55923806fda4f93 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17112 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1')
-rw-r--r--src/drivers/intel/fsp1_1/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 306e09be74..cc3c0a7104 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -111,4 +111,8 @@ config CHECKLIST_DATA_FILE_LOCATION
string
default "src/vendorcode/intel/fsp/fsp1_1/checklist"
+config RESET_ON_INVALID_RAMSTAGE_CACHE
+ bool "Reset the system on S3 wake when ramstage cache invalid."
+ default n
+
endif #PLATFORM_USES_FSP1_1