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author | Andrey Petrov <andrey.petrov@intel.com> | 2016-03-01 16:25:38 -0800 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-03-03 21:26:21 +0100 |
commit | b37fd67e8757e2eaf3ae7dd453e9aaa1518e9439 (patch) | |
tree | ca15584ce96e4f5b349d3af077410342a886edab /src/drivers/intel/fsp2_0/Makefile.inc | |
parent | 0e6c0e18e37b0fa8d543b39a97e676896c7799ba (diff) | |
download | coreboot-b37fd67e8757e2eaf3ae7dd453e9aaa1518e9439.tar.xz |
drivers/intel/fsp2_0: Add coreboot<->FSP header files
This adds important header files that specify calling interface between
coreboot and FSP.
Change-Id: I393601c91e3c3f630e0fc899f1140ecefed8ecba
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/13796
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/intel/fsp2_0/Makefile.inc')
-rw-r--r-- | src/drivers/intel/fsp2_0/Makefile.inc | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc new file mode 100644 index 0000000000..61faefa3b0 --- /dev/null +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -0,0 +1,11 @@ +romstage-y += hand_off_block.c +romstage-y += util.c +romstage-y += memory_init.c + +ramstage-y += graphics.c +ramstage-y += hand_off_block.c +ramstage-y += notify.c +ramstage-y += silicon_init.c +ramstage-y += util.c + +CPPFLAGS_common += -I$(src)/drivers/intel/fsp2_0/include |