drivers/intel/fsp2_0: Make FSP Headers Consumable out of Box

The following patch is based off of the UEFI 2.6 patch. The FSP header files
are temporarily staying in soc/intel/apollolake and FspUpd.h has been relocated
since the other headers expect it to be in the root of an includable directory.
Any struct defines were removed since they are defined in the headers and no
longer need to be explicity declared as struct with the UEFI 2.6 includes.

BUG=chrome-os-partner:54100
BRANCH=none
TEST=confirmed coreboot builds successfully

Change-Id: I10739dca1b6da3f15bd850adf06238f7c51508f7
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>#
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/16308
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

4 files changed, 52 insertions, 46 deletions

diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index a6228f2264..b0436e8290 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -14,33 +14,9 @@
 #define _FSP2_0_API_H_
 
 #include <stddef.h>
-#include <fsp/info_header.h>
-#include <soc/fsp/FspmUpd.h>
-#include <soc/fsp/FspsUpd.h>
+#include <fsp/soc_binding.h>
 
-enum fsp_status {
-	FSP_SUCCESS = 0x00000000,
-	FSP_STATUS_RESET_REQUIRED_COLD = 0x40000001,
-	FSP_STATUS_RESET_REQUIRED_WARM = 0x40000002,
-	FSP_STATUS_RESET_REQUIRED_3 = 0x40000003,
-	FSP_STATUS_RESET_REQUIRED_4 = 0x40000004,
-	FSP_STATUS_RESET_REQUIRED_5 = 0x40000005,
-	FSP_STATUS_RESET_REQUIRED_6 = 0x40000006,
-	FSP_STATUS_RESET_REQUIRED_7 = 0x40000007,
-	FSP_STATUS_RESET_REQUIRED_8 = 0x40000008,
-	FSP_INVALID_PARAMETER = 0x80000002,
-	FSP_UNSUPPORTED = 0x80000003,
-	FSP_NOT_READY = 0x80000006,
-	FSP_DEVICE_ERROR = 0x80000007,
-	FSP_OUT_OF_RESOURCES = 0x80000009,
-	FSP_VOLUME_CORRUPTED = 0x8000000a,
-	FSP_NOT_FOUND = 0x8000000a,
-	FSP_TIMEOUT = 0x80000012,
-	FSP_ABORTED = 0x80000015,
-	FSP_INCOMPATIBLE_VERSION = 0x80000010,
-	FSP_SECURITY_VIOLATION = 0x8000001a,
-	FSP_CRC_ERROR = 0x8000001b,
-};
+#define FSP_SUCCESS	EFI_SUCCESS
 
 enum fsp_boot_mode {
 	FSP_BOOT_WITH_FULL_CONFIGURATION = 0x00,
@@ -64,8 +40,8 @@ void fsp_memory_init(bool s3wake);
 void fsp_silicon_init(void);
 
 /* Callbacks for updating stage-specific parameters */
-void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd);
-void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd);
+void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd);
+void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd);
 
 /* Callback after processing FSP notify */
 void platform_fsp_notify_status(enum fsp_notify_phase phase);
diff --git a/src/drivers/intel/fsp2_0/include/fsp/debug.h b/src/drivers/intel/fsp2_0/include/fsp/debug.h
index 2f1d806b25..ef7131e1c2 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/debug.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/debug.h
@@ -16,18 +16,18 @@
 
 /* FSP debug API */
 void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
-	const struct FSPM_UPD *fspm_old_upd,
-	const struct FSPM_UPD *fspm_new_upd);
-void fsp_debug_after_memory_init(enum fsp_status status);
+	const FSPM_UPD *fspm_old_upd,
+	const FSPM_UPD *fspm_new_upd);
+void fsp_debug_after_memory_init(uint32_t status);
 void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
-	const struct FSPS_UPD *fsps_old_upd,
-	const struct FSPS_UPD *fsps_new_upd);
-void fsp_debug_after_silicon_init(enum fsp_status status);
+	const FSPS_UPD *fsps_old_upd,
+	const FSPS_UPD *fsps_new_upd);
+void fsp_debug_after_silicon_init(uint32_t status);
 void fsp_before_debug_notify(fsp_notify_fn notify,
 	const struct fsp_notify_params *notify_params);
-void fsp_debug_after_notify(enum fsp_status status);
-void fspm_display_upd_values(const struct FSPM_UPD *old,
-	const struct FSPM_UPD *new);
+void fsp_debug_after_notify(uint32_t status);
+void fspm_display_upd_values(const FSPM_UPD *old,
+	const FSPM_UPD *new);
 void fsp_display_hobs(void);
 void fsp_verify_memory_init_hobs(void);
 void fsp_print_header_info(const struct fsp_header *hdr);
@@ -35,10 +35,10 @@ void fsp_print_header_info(const struct fsp_header *hdr);
 /* Callbacks for displaying UPD parameters - place in a separate file
  * that is conditionally build with CONFIG_DISPLAY_UPD_DATA.
  */
-void soc_display_fspm_upd_params(const struct FSPM_UPD *fspm_old_upd,
-	const struct FSPM_UPD *fspm_new_upd);
-void soc_display_fsps_upd_params(const struct FSPS_UPD *fsps_old_upd,
-	const struct FSPS_UPD *fsps_new_upd);
+void soc_display_fspm_upd_params(const FSPM_UPD *fspm_old_upd,
+	const FSPM_UPD *fspm_new_upd);
+void soc_display_fsps_upd_params(const FSPS_UPD *fsps_old_upd,
+	const FSPS_UPD *fsps_new_upd);
 
 /* Callbacks for displaying HOBs - place in a separate file that is
  * conditionally build with CONFIG_DISPLAY_HOBS.
diff --git a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
new file mode 100644
index 0000000000..6369986d2a
--- /dev/null
+++ b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _FSP2_0_SOC_BINDING_H_
+#define _FSP2_0_SOC_BINDING_H_
+
+#pragma pack(push)
+/*
+ * This file is a implementation specific header. i.e. different
+ * FSP implementations for different chipsets.
+ */
+#include <Base.h>
+#include <soc/fsp/FspmUpd.h>
+#include <soc/fsp/FspsUpd.h>
+
+#pragma pack(pop)
+
+#endif
diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h
index 269bb02953..1c8dbba024 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/util.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/util.h
@@ -83,15 +83,15 @@ uintptr_t fsp_load_vbt(void);
  * SoC. If the requested status is not a reboot status or unhandled, this
  * function does nothing.
  */
-void fsp_handle_reset(enum fsp_status status);
+void fsp_handle_reset(uint32_t status);
 
 /* SoC/chipset must provide this to handle platform-specific reset codes */
-void chipset_handle_reset(enum fsp_status status);
+void chipset_handle_reset(uint32_t status);
 
-typedef asmlinkage enum fsp_status (*fsp_memory_init_fn)
+typedef asmlinkage uint32_t (*fsp_memory_init_fn)
 				   (void *raminit_upd, void **hob_list);
-typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn)(void *silicon_upd);
-typedef asmlinkage enum fsp_status (*fsp_notify_fn)(struct fsp_notify_params *);
+typedef asmlinkage uint32_t (*fsp_silicon_init_fn)(void *silicon_upd);
+typedef asmlinkage uint32_t (*fsp_notify_fn)(struct fsp_notify_params *);
 #include <fsp/debug.h>
 
 #endif /* _FSP2_0_UTIL_H_ */