diff options
author | Aaron Durbin <adurbin@chromium.org> | 2016-07-17 17:04:37 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-19 20:15:33 +0200 |
commit | b4302504e3770001bf267e0a58fa4dc7f17f6871 (patch) | |
tree | 9a13478601ad0367505cc7bcdc4d054d10542d3f /src/drivers/intel/fsp2_0/include | |
parent | 27928685198ab911452a3d5f789fec90a575ad05 (diff) | |
download | coreboot-b4302504e3770001bf267e0a58fa4dc7f17f6871.tar.xz |
drivers/intel/fsp2_0: implement common memory_init() tasks
Instead of performing the same tasks in the chipset code move
the common sequences into the FSP 2.0 driver. This handles the
S3 paths as well as saving and restoring the memory data. The
chipset code can always override the settings if needed.
BUG=chrome-os-partner:52679
Change-Id: I098bf95139a0360f028a50aa50d16d264bede386
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15739
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/intel/fsp2_0/include')
-rw-r--r-- | src/drivers/intel/fsp2_0/include/fsp/api.h | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index aa45d97876..9f8aae7f80 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -58,7 +58,7 @@ enum fsp_notify_phase { /* Main FSP stages */ -enum fsp_status fsp_memory_init(void **hob_list, struct range_entry *r); +enum fsp_status fsp_memory_init(struct range_entry *r, bool s3wake); enum fsp_status fsp_silicon_init(struct range_entry *r); enum fsp_status fsp_notify(enum fsp_notify_phase phase); @@ -74,24 +74,18 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd); * points and map 1:1 to the FSP entry points of the same name. * * ### fsp_memory_init(): - * - hob_list: retuns a pointer to the HOB storage area created by FSP * - r: memory range that the binary is allowed to be loaded into + * - s3wake: boolean indicating if the system is waking from resume * * This function is responsible for loading and executing the memory * initialization code from the FSP-M binary. It expects this binary to reside * in cbfs as FSP_M_FILE. * - * The function takes one parameter, which is described below, but does not + * The function takes two parameters, which are described above, but does not * take in memory parameters as an argument. The memory parameters can be filled * in with platform_fsp_memory_init_params_cb(). This is a callback symbol * that fsp_memory_init() will call. The platform must provide this symbol. * - * FSP returns information about the memory layout in a series of structures - * called hand-off-blocks (HOB). The "hob_list" output parameter will point to - * the start of the HOB list. The fsp reserved region will also be described by - * one of the HOBs. For more information on parsing these structures, see - * fsp/util.h - * * * ### fsp_silicon_init(): * - r: memory range that the binary is allowed to be loaded into |