diff options
author | Aaron Durbin <adurbin@chromium.org> | 2016-07-18 00:35:42 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-19 20:18:08 +0200 |
commit | 32ac01823b8345ecd6f557a439153cc2a75596a9 (patch) | |
tree | 863aefacf526b521cb0438e1537cd1a7a709664a /src/drivers/intel/fsp2_0/silicon_init.c | |
parent | d04639b3d62dbd6a5fc7f48493411b9e74f990d1 (diff) | |
download | coreboot-32ac01823b8345ecd6f557a439153cc2a75596a9.tar.xz |
drivers/intel/fsp2_0: load and relocate FSPS in cbmem
The FSPS component loading was just loading to any memory address
listed in the header. That could be anywhere in the address space
including ramstage itself -- let alone corrupting the OS memory on
S3 resume. Remedy this by loading and relocating FSPS into cbmem.
The UEFI 2.4 header files include path are selected to provide the
types necessary for FSP relocation.
BUG=chrome-os-partner:52679
Change-Id: Iaba103190731fc229566a3b0231cf967522040db
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15742
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: John Zhao <john.zhao@intel.com>
Diffstat (limited to 'src/drivers/intel/fsp2_0/silicon_init.c')
-rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 47 |
1 files changed, 43 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index f1deed78d8..83245b8bdb 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -12,9 +12,12 @@ #include <arch/cpu.h> #include <cbfs.h> +#include <cbmem.h> +#include <commonlib/fsp.h> #include <console/console.h> #include <fsp/api.h> #include <fsp/util.h> +#include <program_loading.h> #include <string.h> #include <timestamp.h> @@ -53,11 +56,47 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr) return status; } -enum fsp_status fsp_silicon_init(struct range_entry *range) +enum fsp_status fsp_silicon_init(void) { - /* Load FSP-S and save FSP header. We will need it for Notify */ - if (fsp_load_binary(&fsps_hdr, CONFIG_FSP_S_CBFS, range) != CB_SUCCESS) + struct fsp_header *hdr = &fsps_hdr; + struct cbfsf file_desc; + struct region_device rdev; + const char *name = CONFIG_FSP_S_CBFS; + void *dest; + size_t size; + + if (cbfs_boot_locate(&file_desc, name, NULL)) { + printk(BIOS_ERR, "Could not locate %s in CBFS\n", name); + return FSP_NOT_FOUND; + } + + cbfs_file_data(&rdev, &file_desc); + + /* Load and relocate into CBMEM. */ + size = region_device_sz(&rdev); + dest = cbmem_add(CBMEM_ID_REFCODE, size); + + if (dest == NULL) { + printk(BIOS_ERR, "Could not add FSPS to CBMEM.\n"); + return FSP_NOT_FOUND; + } + + if (rdev_readat(&rdev, dest, 0, size) < 0) + return FSP_NOT_FOUND; + + if (fsp_component_relocate((uintptr_t)dest, dest, size) < 0) { + printk(BIOS_ERR, "Unable to relocate FSPS.\n"); + return FSP_NOT_FOUND; + } + + /* Create new region device in memory after relocation. */ + rdev_chain(&rdev, &addrspace_32bit.rdev, (uintptr_t)dest, size); + + if (fsp_validate_component(hdr, &rdev) != CB_SUCCESS) return FSP_NOT_FOUND; - return do_silicon_init(&fsps_hdr); + /* Signal that FSP component has been loaded. */ + prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL); + + return do_silicon_init(hdr); } |