diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2018-10-01 19:17:11 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-22 08:35:32 +0000 |
| commit | f677d17ab3cfd1471c0f238a0d32b0d56dd8d37f (patch) | |
| tree | 9b0c01512de536210262110ac4e7dfb78d6849c1 /src/drivers/intel/fsp2_0 | |
| parent | 45022ae056cdbf58429b77daf2da176306312801 (diff) | |
| download | coreboot-f677d17ab3cfd1471c0f238a0d32b0d56dd8d37f.tar.xz | |
intel: Use CF9 reset (part 2)
Make use of the common CF9 reset in SOC_INTEL_COMMON_RESET. Also
implement board_reset() as a "full reset" (aka. cold reset) as that
is what was used here for hard_reset().
Drop soc_reset_prepare() thereby, as it was only used for APL. Also,
move the global-reset logic.
We leave some comments to remind us that a system_reset() should
be enough, where a full_reset() is called now (to retain current
behaviour) and looks suspicious.
Note, as no global_reset() is implemented for Denverton-NS, we halt
there now instead of issuing a non-global reset. This seems safer;
a non-global reset might result in a reset loop.
Change-Id: I5e7025c3c9ea6ded18e72037412b60a1df31bd53
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/29169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0')
| -rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 8 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/util.c | 6 |
2 files changed, 8 insertions, 6 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 1026c7982d..5eeea29504 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -18,6 +18,7 @@ #include <assert.h> #include <cbfs.h> #include <cbmem.h> +#include <cf9_reset.h> #include <console/console.h> #include <elog.h> #include <fsp/api.h> @@ -25,7 +26,6 @@ #include <memrange.h> #include <mrc_cache.h> #include <program_loading.h> -#include <reset.h> #include <romstage_handoff.h> #include <string.h> #include <symbols.h> @@ -80,7 +80,8 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) printk(BIOS_ERR, "Failed to recover CBMEM in S3 resume.\n"); /* Failed S3 resume, reset to come up cleanly */ - hard_reset(); + /* FIXME: A "system" reset is likely enough: */ + full_reset(); } } @@ -214,7 +215,8 @@ static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd, * returning error. Invoking a reset here saves time. */ if (!arch_upd->NvsBufferPtr) - hard_reset(); + /* FIXME: A "system" reset is likely enough: */ + full_reset(); arch_upd->BootMode = FSP_BOOT_ON_S3_RESUME; } else { if (arch_upd->NvsBufferPtr) diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c index f84d69cec5..98026f3362 100644 --- a/src/drivers/intel/fsp2_0/util.c +++ b/src/drivers/intel/fsp2_0/util.c @@ -13,10 +13,10 @@ #include <arch/io.h> #include <cbfs.h> +#include <cf9_reset.h> #include <console/console.h> #include <fsp/util.h> #include <lib.h> -#include <reset.h> #include <string.h> static bool looks_like_fsp_header(const uint8_t *raw_hdr) @@ -109,10 +109,10 @@ void fsp_handle_reset(uint32_t status) switch (status) { case FSP_STATUS_RESET_REQUIRED_COLD: - hard_reset(); + full_reset(); break; case FSP_STATUS_RESET_REQUIRED_WARM: - soft_reset(); + system_reset(); break; case FSP_STATUS_RESET_REQUIRED_3: case FSP_STATUS_RESET_REQUIRED_4: |