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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-16 14:02:25 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-18 19:03:22 +0000 |
commit | 157b189f6b97b6e9ecd8d29edbbd045fbbc231f5 (patch) | |
tree | 4562bd212e40d0832fa893935d85a06d82f8a897 /src/drivers/intel | |
parent | 146c09823333c52e8bbca98465ccc8512ec1daa2 (diff) | |
download | coreboot-157b189f6b97b6e9ecd8d29edbbd045fbbc231f5.tar.xz |
cpu/intel: Enter romstage without BIST
When entry to romstage is via cpu/intel/car/romstage.c
BIST has not been passed down the path for sometime.
Change-Id: I345975c53014902269cee21fc393331d33a84dce
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r-- | src/drivers/intel/fsp1_1/car.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c index b206e6d9c3..67fbe69915 100644 --- a/src/drivers/intel/fsp1_1/car.c +++ b/src/drivers/intel/fsp1_1/car.c @@ -37,7 +37,7 @@ void fill_postcar_frame(struct postcar_frame *pcf) } /* This is the romstage entry called from cpu/intel/car/romstage.c */ -void mainboard_romstage_entry(unsigned long bist) +void mainboard_romstage_entry(void) { /* Need to locate the current FSP_INFO_HEADER. The cache-as-ram * is still enabled. We can directly access work buffer here. */ |