diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-07-25 13:02:36 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-07-28 00:36:22 +0200 |
| commit | 0325dc6f7cbdad4fd29315bfcb7f4e54fb678f3e (patch) | |
| tree | c227dd6bba0827e4072cf60ffb60401960af4546 /src/drivers/intel | |
| parent | 2a12e2e8da2477d97b8774babd1a74dda65d11a0 (diff) | |
| download | coreboot-0325dc6f7cbdad4fd29315bfcb7f4e54fb678f3e.tar.xz | |
bootmode: Get rid of CONFIG_BOOTMODE_STRAPS
With VBOOT_VERIFY_FIRMWARE separated from CHROMEOS, move recovery and
developer mode check functions to vboot. Thus, get rid of the
BOOTMODE_STRAPS option which controlled these functions under src/lib.
BUG=chrome-os-partner:55639
Change-Id: Ia2571026ce8976856add01095cc6be415d2be22e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15868
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel')
| -rw-r--r-- | src/drivers/intel/fsp1_1/raminit.c | 4 | ||||
| -rw-r--r-- | src/drivers/intel/fsp1_1/romstage.c | 2 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 6 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index 3eee2da4e5..eca8934aee 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -24,7 +24,7 @@ #include <soc/intel/common/mma.h> #include <string.h> #include <timestamp.h> -#include <bootmode.h> +#include <vboot/vboot_common.h> void raminit(struct romstage_params *params) { @@ -288,7 +288,7 @@ void raminit(struct romstage_params *params) if (mrc_hob == NULL) printk(BIOS_DEBUG, "Memory Configuration Data Hob not present\n"); - else if (!recovery_mode_enabled()) { + else if (!vboot_recovery_mode_enabled()) { /* Do not save MRC data in recovery path */ pei_ptr->data_to_save = GET_GUID_HOB_DATA(mrc_hob); pei_ptr->data_to_save_size = ALIGN( diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index c1b1ca53e2..b5d90c36dd 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -122,7 +122,7 @@ void romstage_common(struct romstage_params *params) params->pei_data->saved_data_size = 0; params->pei_data->saved_data = NULL; if (!params->pei_data->disable_saved_data) { - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { /* Recovery mode does not use MRC cache */ printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 004d7a8ffd..de99d8332a 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -14,7 +14,6 @@ #include <arch/io.h> #include <arch/cpu.h> #include <arch/symbols.h> -#include <bootmode.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -28,6 +27,7 @@ #include <string.h> #include <symbols.h> #include <timestamp.h> +#include <vboot/vboot_common.h> typedef asmlinkage enum fsp_status (*fsp_memory_init_fn) (void *raminit_upd, void **hob_list); @@ -93,7 +93,7 @@ static enum fsp_status do_fsp_post_memory_init(void *hob_list_ptr, bool s3wake, /* Now that CBMEM is up, save the list so ramstage can use it */ fsp_save_hob_list(hob_list_ptr); - if (recovery_mode_enabled()) + if (vboot_recovery_mode_enabled()) fsp_version = MRC_DEAD_VERSION; save_memory_training_data(s3wake, fsp_version); @@ -119,7 +119,7 @@ static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake, return; /* Don't use saved training data when recovery mode is enabled. */ - if (recovery_mode_enabled()) { + if (vboot_recovery_mode_enabled()) { printk(BIOS_DEBUG, "Recovery mode. Not using MRC cache.\n"); return; } |