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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-21 11:16:39 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-07-26 01:21:58 +0200
commit27cd96a661558584977e8a491f5b433f31fa3a29 (patch)
tree338a3160a7101c778d395592444b2c767e95d2a4 /src/drivers/intel
parente2422e38ce0ea69f6881ae159792b1f90471adc7 (diff)
downloadcoreboot-27cd96a661558584977e8a491f5b433f31fa3a29.tar.xz
drivers/intel/fsp2_0: Enable XIP romstage with loaded FSP-M
Separate NO_XIP_EARLY_STAGES from loading FSP-M into cache-as-RAM. Quark executes romstage directly from the SPI flash part (in-place), but loads FSP-M into ESRAM. This split occurs because ESRAM is too small to hold everything while debugging. Platforms executing FSP-M directly from the SPI flash need to select FSP_M_XIP. TEST=Build and run on Galileo Gen2. Change-Id: Ib5313ae96dcec101510e82438b1889d315569696 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15848 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig6
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c2
2 files changed, 7 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 45679f78bf..a669870d9a 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -32,4 +32,10 @@ config FSP_S_FILE
help
The path and filename of the Intel FSP-S binary for this platform.
+config FSP_M_XIP
+ bool "Is FSP-M XIP"
+ default n
+ help
+ Select this value when FSP-M is execute-in-place.
+
endif
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index fb9924456f..8afa6d701c 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -303,7 +303,7 @@ enum fsp_status fsp_memory_init(bool s3wake)
_car_relocatable_data_end - _car_region_start, 0);
memranges_insert(&memmap, (uintptr_t)_program, _program_size, 0);
- if (IS_ENABLED(CONFIG_NO_XIP_EARLY_STAGES))
+ if (!IS_ENABLED(CONFIG_FSP_M_XIP))
status = load_fspm_mem(&hdr, &file_data, &memmap);
else
status = load_fspm_xip(&hdr, &file_data);