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| author | Sebastian "Swift Geek" Grzywna <swiftgeek@gmail.com> | 2016-09-08 02:05:31 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-06-05 17:25:45 +0200 |
| commit | 34e10871f9f1004a0c007a26d2d77440997fafa1 (patch) | |
| tree | 5c6bacf255cfaefe600c5c358b20631ab1db941c /src/drivers/intel | |
| parent | 4c9cf304c7a4512bef50d266c21d7a5adeebe74a (diff) | |
| download | coreboot-34e10871f9f1004a0c007a26d2d77440997fafa1.tar.xz | |
intel/gma: Fix typo GMBUS0 -> GMBUS1 in edid.c
This typo existed in code before rewriting for using
defines and it's clearly visible after rewrite.
Previously it was writing to reserved area of GMBUS0 register,
while values are matching those of GMBUS1.
This line probably is a no-op since it's just sending the STOP
again (without an address set this time).
Change-Id: Ic85ef925c41ad01ed469f9d4f4412cbe44ca6d8e
Signed-off-by: Sebastian "Swift Geek" Grzywna <swiftgeek@gmail.com>
Reviewed-on: https://review.coreboot.org/16341
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/drivers/intel')
| -rw-r--r-- | src/drivers/intel/gma/edid.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c index 390209446f..316e869544 100644 --- a/src/drivers/intel/gma/edid.c +++ b/src/drivers/intel/gma/edid.c @@ -56,7 +56,7 @@ static void intel_gmbus_stop_bus(u8 * mmio, u8 bus) write32(GMBUS1_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP | GMBUS_SLAVE_WRITE | (AT24_ADDR << 1) ); wait_rdy(mmio); - write32(GMBUS0_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP); + write32(GMBUS1_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP); write32(GMBUS2_ADDR, GMBUS_INUSE); } @@ -101,7 +101,7 @@ void intel_gmbus_read_edid(u8 *mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size) | GMBUS_SLAVE_WRITE | GMBUS_CYCLE_WAIT | GMBUS_CYCLE_STOP | (128 << GMBUS_BYTE_COUNT_SHIFT) | (slave << 1) ); wait_rdy(mmio); - write32(GMBUS0_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP ); + write32(GMBUS1_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP ); write32(GMBUS2_ADDR, GMBUS_INUSE); printk (BIOS_SPEW, "EDID:\n"); |