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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-01-14 22:31:54 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-03-18 16:54:08 +0100 |
| commit | 8e079000dc606e4d54d36051173710f4186443c2 (patch) | |
| tree | 70f84ae65487732ee2abbd57753fc9fafc406a96 /src/drivers/intel | |
| parent | 216712ae01993e83265470de1e29744a0970e4fa (diff) | |
| download | coreboot-8e079000dc606e4d54d36051173710f4186443c2.tar.xz | |
nb/i945/gma.c: Refactor panel setup
This reuses some of gm45 code to set up the panel.
Panel start and stop delays and pwm frequency can now be set in
devicetree.
Linux does not make the difference between 945gm and gm45
for panel delays, so it is safe to assume the semantics of those
registers are the same.
The core display clock is computed according to "Mobile Intel® 945
Express Chipset Family" Datasheet.
This selects Legacy backlight mode since most targets have some smm
code that rely on this.
This sets the same backlight frequency as vendor bios on Thinkpad X60
and T60.
A default of 180Hz is selected for the PWM frequency if it is not
defined in the devicetree, this might be annoying for displays that
are LED backlit, but is a safe value for CCFL backlit displays.
Change-Id: I1c47b68eecc19624ee534598c22da183bc89425d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18141
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/drivers/intel')
| -rw-r--r-- | src/drivers/intel/gma/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index 2ee5748e75..dee6865224 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -62,7 +62,7 @@ #define GCFGC 0xf0 /* 915+ only */ #define GC_LOW_FREQUENCY_ENABLE (1 << 7) #define GC_DISPLAY_CLOCK_190_200_MHZ (0 << 4) -#define GC_DISPLAY_CLOCK_333_MHZ (4 << 4) +#define GC_DISPLAY_CLOCK_333_320_MHZ (4 << 4) #define GC_DISPLAY_CLOCK_MASK (7 << 4) #define GM45_GC_RENDER_CLOCK_MASK (0xf << 0) #define GM45_GC_RENDER_CLOCK_266_MHZ (8 << 0) |