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authorSubrata Banik <subrata.banik@intel.com>2019-09-09 13:55:42 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-09-11 14:46:13 +0000
commit1d260e65739e60cb0e3a72c38aded614ea4b193e (patch)
tree7b205a0ce7a0f731858c4b969c0c91c2c47187d4 /src/drivers/intel
parent8edc6dc91f4a46cca81f99101fb13423615c586a (diff)
downloadcoreboot-1d260e65739e60cb0e3a72c38aded614ea4b193e.tar.xz
intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig
For CML & ICL, FSP requires at least heap = 0x10000 and stack = 0x20000. Refer to FSP integration guide to know the exact FSP requirement. BUG=b:140268415 TEST=Build and boot CML-Hatch and ICL. Change-Id: Ic1463181b4a9dca136d00cb2f7e3cce4f7e57bd6 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35301 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 541ec47b46..1e84dabbbe 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -154,8 +154,12 @@ config FSP_USES_CB_STACK
config FSP_TEMP_RAM_SIZE
hex
- default 0x10000
depends on FSP_USES_CB_STACK
+ help
+ The amount of anticipated heap usage in CAR by FSP to setup HOB.
+ This configuration is applicable for FSP specification using shared
+ stack with coreboot/bootloader.
+ Sync this value with Platform FSP integration guide recommendation.
config VERIFY_HOBS
bool "Verify the FSP hand-off-blocks"