summaryrefslogtreecommitdiff
path: root/src/drivers/intel
diff options
context:
space:
mode:
authorAndrey Petrov <andrey.petrov@intel.com>2016-02-25 14:17:45 -0800
committerMartin Roth <martinroth@google.com>2016-03-08 13:44:26 +0100
commit42c4e886c8c9fe35d38f20e3df7e912a538c4f0f (patch)
tree6d91af4e71fb72e91847c37c81812bd709db5985 /src/drivers/intel
parent465fc13c0e69ddcf38168b62104fca37b91bdd68 (diff)
downloadcoreboot-42c4e886c8c9fe35d38f20e3df7e912a538c4f0f.tar.xz
drivers/intel/fsp2_0: Add SiliconInit API
This adds SiliconInit API that is needed to be called after memory has been trained. This call is needed to let the blob do various initialisations of IP blocks. Change-Id: I35e02f22174c8392e55ac869265a19c4309932e5 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/13799 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r--src/drivers/intel/fsp2_0/silicon_init.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
new file mode 100644
index 0000000000..66043c8a49
--- /dev/null
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -0,0 +1,59 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/cpu.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <fsp/api.h>
+#include <fsp/util.h>
+#include <string.h>
+
+struct fsp_header fsps_hdr;
+
+typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn)
+ (void *silicon_upd);
+
+static enum fsp_status do_silicon_init(struct fsp_header *hdr)
+{
+ struct FSPS_UPD upd, *supd;
+ fsp_silicon_init_fn silicon_init;
+ enum fsp_status status;
+
+ supd = (struct FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base);
+
+ if (supd->FspUpdHeader.Signature != FSPS_UPD_SIGNATURE) {
+ printk(BIOS_ERR, "Invalid FSPS signature\n");
+ return FSP_INCOMPATIBLE_VERSION;
+ }
+
+ memcpy(&upd, supd, sizeof(upd));
+
+ /* Give SoC/mainboard a chance to populate entries */
+ platform_fsp_silicon_init_params_cb(&upd);
+
+ silicon_init = (void *) (hdr->image_base +
+ hdr->silicon_init_entry_offset);
+
+ status = silicon_init(&upd);
+ printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
+ return status;
+}
+
+enum fsp_status fsp_silicon_init(struct range_entry *range)
+{
+ /* Load FSP-S and save FSP header. We will need it for Notify */
+ /* TODO: do not hardcode CBFS file names */
+ if (fsp_load_binary(&fsps_hdr, "blobs/fsps.bin", range) != CB_SUCCESS)
+ return FSP_NOT_FOUND;
+
+ return do_silicon_init(&fsps_hdr);
+}