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authorArthur Heymans <arthur@aheymans.xyz>2018-01-07 23:12:49 +0100
committerArthur Heymans <arthur@aheymans.xyz>2018-01-20 16:11:44 +0000
commit82aa8338c7485cf0139cc1a451e84d32194070fd (patch)
tree29341ebbb3ec28997e41ebad765614f90bfa184e /src/drivers/mrc_cache
parent1e931f3e47a24855bd18146ccbaed31273510d6a (diff)
downloadcoreboot-82aa8338c7485cf0139cc1a451e84d32194070fd.tar.xz
drivers/mrc_cache: Always generate an FMAP region
This automatically generates an FMAP region for the MRC_CACHE driver which is easier to handle than a cbfsfile. Adds some spaces and more comments to Makefile.inc to improve readability. Tested on Thinkpad x200 with some proof of concept patches. Change-Id: Iaaca36b1123b094ec1bbe5df4fb25660919173ca Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23150 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers/mrc_cache')
-rw-r--r--src/drivers/mrc_cache/Kconfig4
-rw-r--r--src/drivers/mrc_cache/Makefile.inc21
-rw-r--r--src/drivers/mrc_cache/mrc_cache.c19
3 files changed, 3 insertions, 41 deletions
diff --git a/src/drivers/mrc_cache/Kconfig b/src/drivers/mrc_cache/Kconfig
index c367dcec95..543f310e66 100644
--- a/src/drivers/mrc_cache/Kconfig
+++ b/src/drivers/mrc_cache/Kconfig
@@ -5,10 +5,6 @@ config CACHE_MRC_SETTINGS
if CACHE_MRC_SETTINGS
-config MRC_SETTINGS_CACHE_BASE
- hex
- default 0xfffe0000
-
config MRC_SETTINGS_CACHE_SIZE
hex
default 0x10000
diff --git a/src/drivers/mrc_cache/Makefile.inc b/src/drivers/mrc_cache/Makefile.inc
index 7c8732fb73..0d226fe89a 100644
--- a/src/drivers/mrc_cache/Makefile.inc
+++ b/src/drivers/mrc_cache/Makefile.inc
@@ -1,19 +1,2 @@
-ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
-
-romstage-y += mrc_cache.c
-ramstage-y += mrc_cache.c
-
-# Create and add the MRC cache to the cbfs image
-ifneq ($(CONFIG_CHROMEOS),y)
-$(obj)/mrc.cache: $(obj)/config.h
- dd if=/dev/zero count=1 \
- bs=$(shell printf "%d" $(CONFIG_MRC_SETTINGS_CACHE_SIZE) ) | \
- tr '\000' '\377' > $@
-
-cbfs-files-y += mrc.cache
-mrc.cache-file := $(obj)/mrc.cache
-mrc.cache-position := $(CONFIG_MRC_SETTINGS_CACHE_BASE)
-mrc.cache-type := mrc_cache
-endif # ifneq ($(CONFIG_CHROMEOS),y)
-
-endif # ifeq ($(CONFIG_CACHE_MRC_SETTINGS),y)
+romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
+ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c
index 9732185646..eec1591ce2 100644
--- a/src/drivers/mrc_cache/mrc_cache.c
+++ b/src/drivers/mrc_cache/mrc_cache.c
@@ -98,26 +98,9 @@ static const struct cache_region *cache_regions[] = {
static int lookup_region_by_name(const char *name, struct region *r)
{
- /* This assumes memory mapped boot media just under 4GiB. */
- const uint32_t pointer_base_32bit = -CONFIG_ROM_SIZE;
-
if (fmap_locate_area(name, r) == 0)
return 0;
-
- /* CHROMEOS builds must get their MRC cache from FMAP. */
- if (IS_ENABLED(CONFIG_CHROMEOS)) {
- printk(BIOS_ERR, "MRC: Chrome OS lookup failure.\n");
- return -1;
- }
-
- if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
- return -1;
-
- /* Base is in the form of a pointer. Make it an offset. */
- r->offset = CONFIG_MRC_SETTINGS_CACHE_BASE - pointer_base_32bit;
- r->size = CONFIG_MRC_SETTINGS_CACHE_SIZE;
-
- return 0;
+ return -1;
}
static const struct cache_region *lookup_region_type(int type)