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authorGabe Black <gabeblack@google.com>2011-10-05 01:52:08 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-03-29 23:04:06 +0200
commit4d04a715475a60f627ddeded3385ca04d883a55b (patch)
treecc11b066698ea07cbbb76f5377dfaa78d28c43a9 /src/drivers/oxford
parent1b632aff260695257b78bedc3742652916f2a724 (diff)
downloadcoreboot-4d04a715475a60f627ddeded3385ca04d883a55b.tar.xz
Detect whether the OXPCIE card is really present while in the ROM stage.
Use an int in CAR global data to store whether or not the OXPCIE serial card is actually there. Also, time out if the card doesn't show up quickly enough, don't continue initialization if it's not there, and don't make the initialization routine default to a card if none is found. Change-Id: I9c72d3abc6ee2867b77ab2f2180e6f01f647af8c Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://review.coreboot.org/728 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/drivers/oxford')
-rw-r--r--src/drivers/oxford/oxpcie/oxpcie_early.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c
index 2c7767e50d..4f7a3cb105 100644
--- a/src/drivers/oxford/oxpcie/oxpcie_early.c
+++ b/src/drivers/oxford/oxpcie/oxpcie_early.c
@@ -20,6 +20,8 @@
#include <stdint.h>
#include <arch/io.h>
#include <arch/romcc_io.h>
+#include <cpu/x86/car.h>
+#include <delay.h>
#include <uart8250.h>
#include <device/pci_def.h>
@@ -34,9 +36,13 @@
#define OXPCIE_DEVICE_3 \
PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_SUBORDINATE, 0, 3)
+#if defined(__PRE_RAM__)
+int oxford_oxpcie_present CAR_GLOBAL;
+
void oxford_init(void)
{
u16 reg16;
+ oxford_oxpcie_present = 1;
/* First we reset the secondary bus */
reg16 = pci_read_config16(PCIE_BRIDGE, PCI_BRIDGE_CONTROL);
@@ -69,11 +75,14 @@ void oxford_init(void)
reg16 |= PCI_COMMAND_MEMORY;
pci_write_config16(PCIE_BRIDGE, PCI_COMMAND, reg16);
- // FIXME Add a timeout or this will hang forever if
- // no device is in the slot.
+ u32 timeout = 20000; // Timeout in 10s of microseconds.
u32 id = 0;
- while ((id == 0) || (id == 0xffffffff))
+ for (;;) {
id = pci_read_config32(OXPCIE_DEVICE, PCI_VENDOR_ID);
+ if (!timeout-- || (id != 0 && id != 0xffffffff))
+ break;
+ udelay(10);
+ }
u32 device = OXPCIE_DEVICE; /* unknown default */
switch (id) {
@@ -90,6 +99,10 @@ void oxford_init(void)
case 0xc1581415: /* e.g. Startech MPEX2S952 */
device = OXPCIE_DEVICE;
break;
+ default:
+ /* No UART here. */
+ oxford_oxpcie_present = 0;
+ return;
}
/* Setup base address on device */
@@ -107,3 +120,4 @@ void oxford_init(void)
uart8250_mem_init(uart0_base, (4000000 / CONFIG_TTYS0_BAUD));
}
+#endif