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| author | Aaron Durbin <adurbin@chromium.org> | 2020-01-03 15:31:01 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-01-08 17:18:20 +0000 |
| commit | a8280e4cc0bf146ca29030a8d1d50b7276d26c6e (patch) | |
| tree | 4bb99413942796c8b88f62b226beb18c8db5999d /src/drivers/spi/Kconfig | |
| parent | a48e8f52d872ef9ce848d7337839430204f5b355 (diff) | |
| download | coreboot-a8280e4cc0bf146ca29030a8d1d50b7276d26c6e.tar.xz | |
drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option
The SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option is no longer
being used in the code. There's a runtime check for supporting
fast read dual output mode of the spi flash. Remove the references
to SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B.
Change-Id: Ie7d9d3f91f29a700f07ab33feaf427a872bbf7df
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38166
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/spi/Kconfig')
| -rw-r--r-- | src/drivers/spi/Kconfig | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig index 8300026674..a4be84d814 100644 --- a/src/drivers/spi/Kconfig +++ b/src/drivers/spi/Kconfig @@ -149,15 +149,6 @@ config SPI_FLASH_WINBOND Select this option if your chipset driver needs to store certain data in the SPI flash and your SPI flash is made by Winbond. -config SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B - bool - default n - depends on SPI_FLASH - help - Select this option if your SPI flash supports the fast read dual- - output command (opcode 0x3b) where the opcode and address are sent - to the chip on MOSI and data is received on both MOSI and MISO. - config SPI_FLASH_HAS_VOLATILE_GROUP bool default n |