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| author | Julius Werner <jwerner@chromium.org> | 2019-06-06 17:03:44 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2019-06-10 18:02:33 +0000 |
| commit | 99e45ceb35ff9a4c48e516e6d005ebfae54b6591 (patch) | |
| tree | 8f42f859485f2dd4a0c101e613fd607b3000f219 /src/drivers/spi/gigadevice.c | |
| parent | 1b7f99bd6b52e3fd03653dca80af3faf6e7e8852 (diff) | |
| download | coreboot-99e45ceb35ff9a4c48e516e6d005ebfae54b6591.tar.xz | |
spi_flash: Add Dual SPI support
This patch adds support to read SPI flash in Dual SPI mode, where both
MISO and MOSI lines are used for output mode (specifically Fast Read
Dual Output (0x3b) where the command is still sent normally, not Fast
Read Dual I/O (0xbb) whose additional benefit should be extremely
marginal for our use cases but which would be more complicated to
implement). This feature needs to be supported by both the flash chip
and the controller, so we add a new dual_spi flag (and a new flags field
to hold it) to the spi_flash structure and a new optional xfer_dual()
function pointer to the spi_ctrlr structure. When both are provided,
Dual SPI mode is used automatically, otherwise things work as before.
This patch only adds the dual_spi flag exemplary to all Winbond and
Gigadevice chips, other vendors need to be added as needed.
Change-Id: Ic6808224c99af32b6c5c43054135c8f4c03c1feb
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/spi/gigadevice.c')
| -rw-r--r-- | src/drivers/spi/gigadevice.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/drivers/spi/gigadevice.c b/src/drivers/spi/gigadevice.c index cc4cf1dddb..1ff594a24a 100644 --- a/src/drivers/spi/gigadevice.c +++ b/src/drivers/spi/gigadevice.c @@ -41,7 +41,9 @@ struct gigadevice_spi_flash_params { uint16_t id; - uint8_t l2_page_size_shift; + uint8_t dual_spi : 1; + uint8_t _reserved_for_flags : 3; + uint8_t l2_page_size_shift : 4; uint8_t pages_per_sector_shift : 4; uint8_t sectors_per_block_shift : 4; uint8_t nr_blocks_shift; @@ -63,6 +65,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 4, + .dual_spi = 1, .name = "GD25Q80", }, /* also GD25Q80B */ { @@ -71,6 +74,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 5, + .dual_spi = 1, .name = "GD25Q16", }, /* also GD25Q16B */ { @@ -79,6 +83,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 6, + .dual_spi = 1, .name = "GD25Q32B", }, /* also GD25Q32B */ { @@ -87,6 +92,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 7, + .dual_spi = 1, .name = "GD25Q64", }, /* also GD25Q64B, GD25B64C */ { @@ -95,6 +101,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 8, + .dual_spi = 1, .name = "GD25Q128", }, /* also GD25Q128B */ { @@ -103,6 +110,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 4, + .dual_spi = 1, .name = "GD25VQ80C", }, { @@ -111,6 +119,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 5, + .dual_spi = 1, .name = "GD25VQ16C", }, { @@ -119,6 +128,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 4, + .dual_spi = 1, .name = "GD25LQ80", }, { @@ -127,6 +137,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 5, + .dual_spi = 1, .name = "GD25LQ16", }, { @@ -135,6 +146,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 6, + .dual_spi = 1, .name = "GD25LQ32", }, { @@ -143,6 +155,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 7, + .dual_spi = 1, .name = "GD25LQ64C", }, /* also GD25LB64C */ { @@ -151,6 +164,7 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = { .pages_per_sector_shift = 4, .sectors_per_block_shift = 4, .nr_blocks_shift = 8, + .dual_spi = 1, .name = "GD25LQ128", }, }; |