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authorShelley Chen <shchen@chromium.org>2017-12-15 15:25:08 -0800
committerShelley Chen <shchen@google.com>2017-12-18 00:37:44 +0000
commitf2e7b37c52cac5e7825d0e01b3c45c1506e99253 (patch)
treef560630315c3be0550bbf96cc447cb6f786fb56e /src/drivers/spi
parentdecd062875c1e33d4c9203c2edc0652792a46e73 (diff)
downloadcoreboot-f2e7b37c52cac5e7825d0e01b3c45c1506e99253.tar.xz
spi/tpm: Clear pending irqs during tpm2_init
Seeing some instances were cr50 spi driver is starting a new transaction without getting a ready interrupt from cr50, which means that there are pending interrupts. Clearing these to be sure there are not any stale irqs for the next transaction. BUG=b:69567837 BRANCH=None TEST=run FAFT and see if any 0x2b recovery boots occur Change-Id: Ie099da9f2b3c4da417648ae10a5ba356b7a093ff Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/22909 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/spi')
-rw-r--r--src/drivers/spi/tpm/tpm.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c
index e1fec28a41..ceec0b0bc6 100644
--- a/src/drivers/spi/tpm/tpm.c
+++ b/src/drivers/spi/tpm/tpm.c
@@ -429,6 +429,9 @@ int tpm2_init(struct spi_slave *spi_if)
memcpy(spi_slave, spi_if, sizeof(*spi_if));
+ /* clear any pending irqs */
+ tis_plat_irq_status();
+
/*
* 150 ms should be enough to synchronize with the TPM even under the
* worst nested reset request conditions. In vast majority of cases