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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-04 13:13:20 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-09 18:44:47 +0200 |
| commit | 148762110c8a00c88b8e0326ec69dc7392bf3739 (patch) | |
| tree | 75073d645ac062177a466e9451db8796fd1fdde8 /src/drivers/uart/uart8250io.c | |
| parent | a63398059bdd5911e9e5e670873183cdb376acf7 (diff) | |
| download | coreboot-148762110c8a00c88b8e0326ec69dc7392bf3739.tar.xz | |
drivers/uart: Enable override for input clock divider
Allow the platform to override the input clock divider by adding the
uart_input_clock_divider routine. This routine combines the baud-rate
oversample divider with any other input clock divider. The default
routine returns 16 which is the standard baud-rate oversampling value.
A platform may override this default "weak" routine by providing a new
routine and selecting UART_OVERRIDE_INPUT_CLOCK_DIVIDER. This works
around ROMCC not supporting weak routines.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file:
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
* Testing is successful when CorebootPayloadPkg is able to properly
initialize the serial port without using built-in values.
Change-Id: Ieb6453b045d84702b8f730988d0fed9f253f63e2
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14611
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/uart/uart8250io.c')
| -rw-r--r-- | src/drivers/uart/uart8250io.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index 0974005a81..69244f58df 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -30,8 +30,12 @@ /* Nominal values only, good for the range of choices Kconfig offers for * set of standard baudrates. */ -#define BAUDRATE_REFCLK (115200) -#define BAUDRATE_OVERSAMPLE (1) + +/* Multiply the maximim baud-rate by the default oversample rate to compute + * the default input clock to the UART. The uart_baudrate_divisor divides + * by the oversample clock to determine the final baud-rate. + */ +#define BAUDRATE_REFCLK (115200 * 16) /* Expected character delay at 1200bps is 9ms for a working UART * and no flow-control. Assume UART as stuck if shift register @@ -112,7 +116,7 @@ void uart_init(int idx) { unsigned int div; div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, - BAUDRATE_OVERSAMPLE); + uart_input_clock_divider()); uart8250_init(uart_platform_base(idx), div); } |