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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-07 09:04:46 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-09 18:45:44 +0200 |
| commit | 6ec72c9b4f4a903d9a451bc17629e679399aa9ee (patch) | |
| tree | 815f70ba90e3646911d8380d803c823f1fefb507 /src/drivers/uart/uart8250io.c | |
| parent | 148762110c8a00c88b8e0326ec69dc7392bf3739 (diff) | |
| download | coreboot-6ec72c9b4f4a903d9a451bc17629e679399aa9ee.tar.xz | |
drivers/uart: Use uart_platform_refclk for all UART models
Allow the platform to override the input clock for the UART by
implementing the routine uart_platform_refclk and setting the Kconfig
value UART_OVERRIDE_REFCLK. Provide a default uart_platform_refclk
routine which is disabled when UART_OVERRIDE_REFCLK is selected. This
works around ROMCC not supporting weak routines.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file:
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
* Testing is successful when CorebootPayloadPkg is able to properly
initialize the serial port without using built-in values.
Change-Id: If4afc45a828e5ba935fecb6d95b239625e912d14
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14612
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/uart/uart8250io.c')
| -rw-r--r-- | src/drivers/uart/uart8250io.c | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index 69244f58df..89c447658a 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -27,16 +27,6 @@ /* Should support 8250, 16450, 16550, 16550A type UARTs */ -/* Nominal values only, good for the range of choices Kconfig offers for - * set of standard baudrates. - */ - -/* Multiply the maximim baud-rate by the default oversample rate to compute - * the default input clock to the UART. The uart_baudrate_divisor divides - * by the oversample clock to determine the final baud-rate. - */ -#define BAUDRATE_REFCLK (115200 * 16) - /* Expected character delay at 1200bps is 9ms for a working UART * and no flow-control. Assume UART as stuck if shift register * or FIFO takes more than 50ms per character to appear empty. @@ -115,7 +105,7 @@ uintptr_t uart_platform_base(int idx) void uart_init(int idx) { unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, + div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), uart_input_clock_divider()); uart8250_init(uart_platform_base(idx), div); } @@ -143,10 +133,7 @@ void uart_fill_lb(void *data) serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); serial.regwidth = 1; - if (IS_ENABLED(CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK)) - serial.input_hertz = uart_platform_refclk(); - else - serial.input_hertz = 0; + serial.input_hertz = uart_platform_refclk(); serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data); |