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author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2020-03-23 22:01:45 -0600 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-25 10:52:06 +0000 |
commit | 9e71fdd506752391b36c518b545cf03f37351ed5 (patch) | |
tree | de6091bbae7a47dd0b4cd4618283917a66a4c117 /src/drivers/uart | |
parent | e680caa2988ee1c6b08e1ba3ed85574ca4c4da43 (diff) | |
download | coreboot-9e71fdd506752391b36c518b545cf03f37351ed5.tar.xz |
mb/google/dedede: Update EC_MKBP_INT_L configuration
The concerned GPIO is configured as an open drain at the Embedded
Controller side without an external pull-up. This causes leakage in the
PP3300_A rail. So configure the GPIO to have a weak internal pull-up at
the SoC side.
BUG=b:151680590
TEST=Build the mainboard. Ensure that there are no leakages in the
PP3300_A rail.
Change-Id: I5553cf40adb92edc0fecab5c875ec8d72063ba7b
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39796
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/uart')
0 files changed, 0 insertions, 0 deletions