diff options
| author | Simon Glass <sjg@chromium.org> | 2016-08-27 15:03:02 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-10-06 21:49:25 +0200 |
| commit | aa58a9eebfc1a60ccc614ef6a064cf0ffce1c114 (patch) | |
| tree | 3628144a13f7417f41db38087428bb7079944571 /src/drivers | |
| parent | dd42db63489d2a2021f40aec894b1eded62e9a04 (diff) | |
| download | coreboot-aa58a9eebfc1a60ccc614ef6a064cf0ffce1c114.tar.xz | |
spi: Add a way to show SPI transfer speed for reads
SPI read speed directly impacts boot time and we do quite a lot of
reading.
Add a way to easily find out the speed of SPI flash reads within
coreboot.
Write speed is less important since there are very few writes and they
are small.
BUG=chrome-os-partner:56556
BRANCH=none
TEST=run on gru with SPI_SPEED_DEBUG set to 1. See the output messages:
read SPI 627d4 7d73: 18455 us, 1740 KB/s, 13.920 Mbps
Change-Id: Id3814bd2b7bd045cdfcc67eb1fabc861bf9ed3b2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 82cb93f6be47efce3b0a3843bab89d2381baef89
Original-Change-Id: Iec66f5b8e3ad62f14d836a538dc7801e4ca669e7
Original-Signed-off-by: Simon Glass <sjg@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/376944
Original-Commit-Ready: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Simon Glass <sjg@google.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16701
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/spi/cbfs_spi.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/drivers/spi/cbfs_spi.c b/src/drivers/spi/cbfs_spi.c index 1895b9df1e..46e7346379 100644 --- a/src/drivers/spi/cbfs_spi.c +++ b/src/drivers/spi/cbfs_spi.c @@ -23,14 +23,44 @@ #include <spi_flash.h> #include <symbols.h> #include <cbmem.h> +#include <timer.h> static struct spi_flash *spi_flash_info; +/* + * Set this to 1 to debug SPI speed, 0 to disable it + * The format is: + * + * read SPI 62854 7db7: 10416 us, 3089 KB/s, 24.712 Mbps + * + * The important number is the last one. It should roughly match your SPI + * clock. If it doesn't, your driver might need a little tuning. + */ +#define SPI_SPEED_DEBUG 0 + static ssize_t spi_readat(const struct region_device *rd, void *b, size_t offset, size_t size) { + struct stopwatch sw; + bool show = SPI_SPEED_DEBUG && size >= 4 * KiB; + + if (show) + stopwatch_init(&sw); if (spi_flash_info->read(spi_flash_info, offset, size, b)) return -1; + if (show) { + long usecs; + + usecs = stopwatch_duration_usecs(&sw); + u64 speed; /* KiB/s */ + int bps; /* Bits per second */ + + speed = (u64)size * 1000 / usecs; + bps = speed * 8; + + printk(BIOS_DEBUG, "read SPI %#zx %#zx: %ld us, %lld KB/s, %d.%03d Mbps\n", + offset, size, usecs, speed, bps / 1000, bps % 1000); + } return size; } |