diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-02-19 21:40:15 +0100 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2021-03-01 19:42:07 +0000 |
commit | ec953face1ef1e09bc3ebcf5513dfb03253117dc (patch) | |
tree | 6145ba6223cfa00deec33d1058796898dfe1ec62 /src/drivers | |
parent | 3157068bf806aa80285b6a65e7f127e18ef3664c (diff) | |
download | coreboot-ec953face1ef1e09bc3ebcf5513dfb03253117dc.tar.xz |
skylake,fsp1_1: Delete dead `report_memory_config()` function
RAM is not yet configured in bootblock. This function was copy-pasted
from Broadwell. Also, Skylake no longer uses FSP 1.1 and the stubs in
there can be removed as nothing else uses them.
Change-Id: I22cb7e63ed1e9565934296fd40771130ba91d227
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50949
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
-rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/romstage.h | 1 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/raminit.c | 3 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/romstage.c | 5 |
3 files changed, 0 insertions, 9 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index 23eadfa978..db4b352594 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -34,7 +34,6 @@ void mainboard_add_dimm_info(struct romstage_params *params, struct memory_info *mem_info, int channel, int dimm, int index); void raminit(struct romstage_params *params); -void report_memory_config(void); /* Initialize memory margin analysis settings. */ void setup_mma(MEMORY_INIT_UPD *memory_upd); void soc_after_ram_init(struct romstage_params *params); diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index 4c468e5534..44e7693991 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -237,9 +237,6 @@ void raminit(struct romstage_params *params) die_with_post_code(POST_INVALID_VENDOR_BINARY, "ERROR - coreboot's requirements not met by FSP binary!\n"); - /* Display the memory configuration */ - report_memory_config(); - /* Locate the memory configuration data to speed up the next reboot */ mrc_hob = get_next_guid_hob(&mrc_guid, hob_list_ptr); if (mrc_hob == NULL) { diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 5129dc696b..1befc471c5 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -291,11 +291,6 @@ __weak int mrc_cache_stash_data(int type, uint32_t version, return -1; } -/* Display the memory configuration */ -__weak void report_memory_config(void) -{ -} - /* SOC initialization after RAM is enabled */ __weak void soc_after_ram_init(struct romstage_params *params) { |