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authorMatthew Garrett <mjg59@google.com>2018-07-28 16:53:16 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-05-06 10:35:25 +0000
commit78b58a4996d42191f5dc941f9c14fa07228acca1 (patch)
treeeb1adaaf32316aabdd8d397eed5192c1aa3b0b71 /src/drivers
parent6629b4bbf810e5d2e9323651acf8afb2936cf10b (diff)
downloadcoreboot-78b58a4996d42191f5dc941f9c14fa07228acca1.tar.xz
drivers/intel/fsp2_0: Fix fsp post-init validation
Part of this checks whether tolum_base and cbmem_top are the same - however, cbmem_top hasn't been initialised at the point where this call occurs. Change the ordering to fix that. Signed-off-by: Matthew Garrett <mjg59@google.com> Change-Id: Ib89e0513bdc35c3751a9d4c2a2789a2836046789 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32530 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 985ee3a07f..b3afb98c4d 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -310,8 +310,6 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake,
post_code(POST_FSP_MEMORY_EXIT);
timestamp_add_now(TS_FSP_MEMORY_INIT_END);
- fsp_debug_after_memory_init(status);
-
/* Handle any errors returned by FspMemoryInit */
fsp_handle_reset(status);
if (status != FSP_SUCCESS) {
@@ -320,6 +318,13 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake,
}
do_fsp_post_memory_init(s3wake, fsp_version);
+
+ /*
+ * fsp_debug_after_memory_init() checks whether the end of the tolum
+ * region is the same as the top of cbmem, so must be called here
+ * after cbmem has been initialised in do_fsp_post_memory_init().
+ */
+ fsp_debug_after_memory_init(status);
}
/* Load the binary into the memory specified by the info header. */