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authorArthur Heymans <arthur@aheymans.xyz>2019-01-06 14:09:31 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-14 19:42:59 +0000
commit3ef017c4d4975aa055f8be3dc8a5cf37250f88e2 (patch)
treefad2ce191d02d41f1517f7d90212c9933d9c9ac7 /src/drivers
parent3d3152eec7efe9bf02499c42b92b4ad22bd7fd4e (diff)
downloadcoreboot-3ef017c4d4975aa055f8be3dc8a5cf37250f88e2.tar.xz
[RFC]util/checklist: Remove this functionality
It was only hooked up for galileo board when using the obsolete FSP1.1. I don't see how it can be useful... Change-Id: Ifd7cbd664cfa3b729a11c885134fd9b5de62a96c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30691 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/intel/fsp1_1/Kconfig4
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index af6ed422a1..2575577ba4 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -86,10 +86,6 @@ config USE_GENERIC_FSP_CAR_INC
The chipset can select this to use a generic cache_as_ram.inc file
that should be good for all FSP based platforms.
-config CHECKLIST_DATA_FILE_LOCATION
- string
- default "src/vendorcode/intel/fsp/fsp1_1/checklist"
-
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 28e9e5dcd3..8156d187dc 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -146,10 +146,6 @@ config VERIFY_HOBS
Verify that the HOBs required by coreboot are returned by FSP and
that the resource HOBs are in the correct order and position.
-config CHECKLIST_DATA_FILE_LOCATION
- string
- default "src/vendorcode/intel/fsp/fsp2_0/checklist"
-
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n