summaryrefslogtreecommitdiff
path: root/src/drivers
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@chromium.org>2017-03-31 13:18:00 -0700
committerFurquan Shaikh <furquan@google.com>2017-04-05 20:25:34 +0200
commit580e0c584f1ba0f5196c2a3880b55592909d9df4 (patch)
tree24f48d7a46236f899e716e30ef87457cd5ec6789 /src/drivers
parent2fb5ca81d9b15d956949907c83e61c97d958992e (diff)
downloadcoreboot-580e0c584f1ba0f5196c2a3880b55592909d9df4.tar.xz
drivers/spi/tpm: Add tis.c and tpm.c to ramstage and romstage
These files are required to support recovery MRC cache hash save/restore in romtage/ramstage. BUG=b:35583330 Change-Id: Idd0a4ee1c5f8f861caf40d841053b83a9d7aaef8 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19092 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/spi/tpm/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/drivers/spi/tpm/Makefile.inc b/src/drivers/spi/tpm/Makefile.inc
index 7d1b390f08..cc7d715609 100644
--- a/src/drivers/spi/tpm/Makefile.inc
+++ b/src/drivers/spi/tpm/Makefile.inc
@@ -1,4 +1,6 @@
verstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
+romstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
+ramstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
ifneq ($(CONFIG_CHROMEOS),y)
bootblock-$(CONFIG_SPI_TPM) += tis.c tpm.c