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authorMartin Roth <martinroth@google.com>2015-11-27 13:05:04 -0700
committerMartin Roth <martinroth@google.com>2015-12-06 18:46:12 +0100
commit7c38e1e8bc47c2842b23c565a35f8d959428ec3c (patch)
tree8c85b6227ae2d72c37f77cc68483778bb34e450b /src/drivers
parent19fbdcc8283e0e499cb517d1149225bfadc61f03 (diff)
downloadcoreboot-7c38e1e8bc47c2842b23c565a35f8d959428ec3c.tar.xz
Remove #ifdef checks on Kconfig symbols
In coreboot, bool, hex, and int type symbols are ALWAYS defined. Change-Id: I58a36b37075988bb5ff67ac692c7d93c145b0dbc Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12560 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/intel/fsp1_0/cache_as_ram.inc4
-rw-r--r--src/drivers/intel/fsp1_0/fastboot_cache.c4
-rw-r--r--src/drivers/intel/fsp1_0/fsp_util.c4
-rw-r--r--src/drivers/pc80/mc146818rtc_early.c3
-rw-r--r--src/drivers/pc80/tpm/tpm.c5
5 files changed, 0 insertions, 20 deletions
diff --git a/src/drivers/intel/fsp1_0/cache_as_ram.inc b/src/drivers/intel/fsp1_0/cache_as_ram.inc
index 045bfb31bc..e79c3c19a6 100644
--- a/src/drivers/intel/fsp1_0/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_0/cache_as_ram.inc
@@ -20,10 +20,6 @@
#include <cpu/x86/post_code.h>
#include <cbmem.h>
-#ifndef CONFIG_FSP_LOC
-# error "CONFIG_FSP_LOC must be set."
-#endif
-
cmp $0, %eax
je cache_as_ram
mov $0xa0, %eax
diff --git a/src/drivers/intel/fsp1_0/fastboot_cache.c b/src/drivers/intel/fsp1_0/fastboot_cache.c
index b836a89c64..5c7179e3b9 100644
--- a/src/drivers/intel/fsp1_0/fastboot_cache.c
+++ b/src/drivers/intel/fsp1_0/fastboot_cache.c
@@ -27,10 +27,6 @@
#include <lib.h> // hexdump
#include "fsp_util.h"
-#ifndef CONFIG_VIRTUAL_ROM_SIZE
-#error "CONFIG_VIRTUAL_ROM_SIZE must be set."
-#endif
-
/* convert a pointer to flash area into the offset inside the flash */
static inline u32 to_flash_offset(void *p) {
return ((u32)p + CONFIG_VIRTUAL_ROM_SIZE);
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
index 8688ca54ff..85ee9a9013 100644
--- a/src/drivers/intel/fsp1_0/fsp_util.c
+++ b/src/drivers/intel/fsp1_0/fsp_util.c
@@ -115,10 +115,6 @@ volatile u8 * find_fsp ()
volatile u8 *fsp_ptr;
#endif /* __PRE_RAM__ */
-#ifndef CONFIG_FSP_LOC
-#error "CONFIG_FSP_LOC must be set."
-#endif
-
/* The FSP is stored in CBFS */
fsp_ptr = (u8 *) CONFIG_FSP_LOC;
diff --git a/src/drivers/pc80/mc146818rtc_early.c b/src/drivers/pc80/mc146818rtc_early.c
index 268cfc2fe6..3ff5d4fb3e 100644
--- a/src/drivers/pc80/mc146818rtc_early.c
+++ b/src/drivers/pc80/mc146818rtc_early.c
@@ -5,9 +5,6 @@
#include "option_table.h"
#endif
-#ifndef CONFIG_MAX_REBOOT_CNT
-#error "CONFIG_MAX_REBOOT_CNT not defined"
-#endif
#if CONFIG_MAX_REBOOT_CNT > 15
#error "CONFIG_MAX_REBOOT_CNT too high"
#endif
diff --git a/src/drivers/pc80/tpm/tpm.c b/src/drivers/pc80/tpm/tpm.c
index ea1109510e..064cb994fb 100644
--- a/src/drivers/pc80/tpm/tpm.c
+++ b/src/drivers/pc80/tpm/tpm.c
@@ -49,11 +49,6 @@
/* coreboot wrapper for TPM driver (end) */
-#ifndef CONFIG_TPM_TIS_BASE_ADDRESS
-/* Base TPM address standard for x86 systems */
-#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
-#endif
-
/* the macro accepts the locality value, but only locality 0 is operational */
#define TIS_REG(LOCALITY, REG) \
(void *)(CONFIG_TPM_TIS_BASE_ADDRESS + (LOCALITY << 12) + REG)