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authorMarc Jones <marc.jones@se-eng.com>2014-12-29 21:31:44 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-12-30 19:28:27 +0100
commit3cc685fd3e851b1bd2b77690ee05ca7f6c5974f7 (patch)
treebf993dc82a3a690d49a304f118ef89b755c194f9 /src/drivers
parent8b143c5c8bb2825b8ea1a704066023307c49e21f (diff)
downloadcoreboot-3cc685fd3e851b1bd2b77690ee05ca7f6c5974f7.tar.xz
rtc: Add an RTC API, and implement it for x86.
This CL adds an API for RTC drivers, and implements its two functions, rtc_get and rtc_set, for x86's RTC. The function which resets the clock when the CMOS as lost state now uses the RTC driver instead of accessing the those registers directly. BUG=None TEST=Built and booted on Link with the event log code modified to use the RTC interface. Verified that the event times were accurate. BRANCH=nyan Original-Change-Id: Ifa807898e583254e57167fd44932ea86627a02ee Original-Signed-off-by: Gabe Black <gabeblack@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197795 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Tested-by: Gabe Black <gabeblack@chromium.org> Original-Commit-Queue: Gabe Black <gabeblack@chromium.org> This is the first half of the patch. (cherry picked from commit 9e0fd75142d29afe34f6c6b9ce0099f478ca5a93) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I159f9b4872a0bb932961b4168b180c087dfb1883 Reviewed-on: http://review.coreboot.org/7889 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/pc80/Kconfig4
-rw-r--r--src/drivers/pc80/Makefile.inc9
-rw-r--r--src/drivers/pc80/mc146818rtc.c87
3 files changed, 77 insertions, 23 deletions
diff --git a/src/drivers/pc80/Kconfig b/src/drivers/pc80/Kconfig
index 5fad3a5433..f8ac5c5a6a 100644
--- a/src/drivers/pc80/Kconfig
+++ b/src/drivers/pc80/Kconfig
@@ -22,3 +22,7 @@ config LPC_TPM
Enable this option to enable TPM support in coreboot.
If unsure, say N.
+
+config DRIVERS_MC146818
+ bool
+ default y if ARCH_X86
diff --git a/src/drivers/pc80/Makefile.inc b/src/drivers/pc80/Makefile.inc
index fe6d11fd36..1d28152a70 100644
--- a/src/drivers/pc80/Makefile.inc
+++ b/src/drivers/pc80/Makefile.inc
@@ -1,5 +1,5 @@
-romstage-y += mc146818rtc.c
-ramstage-y += mc146818rtc.c
+romstage-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
+ramstage-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
ramstage-y += isa-dma.c
ramstage-y += i8254.c
ramstage-y += i8259.c
@@ -7,7 +7,10 @@ ramstage-$(CONFIG_UDELAY_IO) += udelay_io.c
ramstage-y += keyboard.c
ramstage-$(CONFIG_SPKMODEM) += spkmodem.c
+ifeq ($(CONFIG_DRIVERS_MC146818),y)
romstage-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.c
+endif
+
romstage-$(CONFIG_LPC_TPM) += tpm.c
romstage-$(CONFIG_SPKMODEM) += spkmodem.c
@@ -17,4 +20,4 @@ cbfs-files-$(CONFIG_HAVE_CMOS_DEFAULT) += cmos.default
cmos.default-file = $(CONFIG_CMOS_DEFAULT_FILE):nvramtool
cmos.default-type = 0xaa
-smm-y += mc146818rtc.c
+smm-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c
index 014a8c9402..84abd4309c 100644
--- a/src/drivers/pc80/mc146818rtc.c
+++ b/src/drivers/pc80/mc146818rtc.c
@@ -1,28 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/acpi.h>
+#include <bcd.h>
#include <stdint.h>
#include <version.h>
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <boot/coreboot_tables.h>
+#include <rtc.h>
#include <string.h>
#if CONFIG_USE_OPTION_TABLE
#include "option_table.h"
#include <cbfs.h>
#endif
-#include <arch/acpi.h>
-static void cmos_update_date(u8 has_century)
+static void cmos_reset_date(u8 has_century)
{
/* Now setup a default date equals to the build date */
- cmos_write(0, RTC_CLK_SECOND);
- cmos_write(0, RTC_CLK_MINUTE);
- cmos_write(1, RTC_CLK_HOUR);
- cmos_write(coreboot_build_date.weekday + 1, RTC_CLK_DAYOFWEEK);
- cmos_write(coreboot_build_date.day, RTC_CLK_DAYOFMONTH);
- cmos_write(coreboot_build_date.month, RTC_CLK_MONTH);
- cmos_write(coreboot_build_date.year, RTC_CLK_YEAR);
- if (has_century)
- cmos_write(coreboot_build_date.century, RTC_CLK_ALTCENTURY);
+ struct rtc_time time = {
+ .sec = 0,
+ .min = 0,
+ .hour = 1,
+ .mday = bcd2bin(coreboot_build_date.day),
+ .mon = bcd2bin(coreboot_build_date.month),
+ .year = (bcd2bin(coreboot_build_date.century) * 100) +
+ bcd2bin(coreboot_build_date.year),
+ .wday = bcd2bin(coreboot_build_date.weekday)
+ };
+ rtc_set(&time, has_century);
}
#if CONFIG_USE_OPTION_TABLE
@@ -50,15 +73,8 @@ static void cmos_set_checksum(int range_start, int range_end, int cks_loc)
}
#endif
-#if CONFIG_ARCH_X86
#define RTC_CONTROL_DEFAULT (RTC_24H)
#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
-#else
-#if CONFIG_ARCH_ALPHA
-#define RTC_CONTROL_DEFAULT (RTC_SQWE | RTC_24H)
-#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
-#endif
-#endif
#ifndef __SMM__
void cmos_init(int invalid)
@@ -107,7 +123,7 @@ void cmos_init(int invalid)
cmos_write(0, i);
#endif
if (cmos_invalid)
- cmos_update_date(RTC_HAS_NO_ALTCENTURY);
+ cmos_reset_date(RTC_HAS_NO_ALTCENTURY);
printk(BIOS_WARNING, "RTC:%s%s%s%s\n",
invalid?" Clear requested":"",
@@ -323,5 +339,36 @@ void cmos_check_update_date(u8 has_century)
* if the date is valid.
*/
if (century > 0x99 || year > 0x99) /* Invalid date */
- cmos_update_date(has_century);
+ cmos_reset_date(has_century);
+}
+
+int rtc_set(const struct rtc_time *time, u8 has_century)
+{
+ cmos_write(bin2bcd(time->sec), RTC_CLK_SECOND);
+ cmos_write(bin2bcd(time->min), RTC_CLK_MINUTE);
+ cmos_write(bin2bcd(time->hour), RTC_CLK_HOUR);
+ cmos_write(bin2bcd(time->mday), RTC_CLK_DAYOFMONTH);
+ cmos_write(bin2bcd(time->mon), RTC_CLK_MONTH);
+ cmos_write(bin2bcd(time->year % 100), RTC_CLK_YEAR);
+ if (has_century)
+ cmos_write(bin2bcd(time->year / 100),
+ RTC_CLK_ALTCENTURY);
+ cmos_write(bin2bcd(time->wday + 1), RTC_CLK_DAYOFWEEK);
+ return 0;
+}
+
+int rtc_get(struct rtc_time *time, u8 has_century)
+{
+ time->sec = bcd2bin(cmos_read(RTC_CLK_SECOND));
+ time->min = bcd2bin(cmos_read(RTC_CLK_MINUTE));
+ time->hour = bcd2bin(cmos_read(RTC_CLK_HOUR));
+ time->mday = bcd2bin(cmos_read(RTC_CLK_DAYOFMONTH));
+ time->mon = bcd2bin(cmos_read(RTC_CLK_MONTH));
+ time->year = bcd2bin(cmos_read(RTC_CLK_YEAR));
+ if (has_century)
+ time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100;
+ else
+ time->year += 2000;
+ time->wday = bcd2bin(cmos_read(RTC_CLK_DAYOFWEEK)) - 1;
+ return 0;
}