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author | Nico Huber <nico.h@gmx.de> | 2018-05-27 13:52:28 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2018-05-31 15:10:21 +0000 |
commit | 654cc2fe109ea1be4d22447b3d0e6eb22a75b550 (patch) | |
tree | df38c7f7fae159a0549c31acd39b4dd8648fc538 /src/drivers | |
parent | 6197b7698875271a2b72e730040ec7e9260a454c (diff) | |
download | coreboot-654cc2fe109ea1be4d22447b3d0e6eb22a75b550.tar.xz |
{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate
Change-Id: Ibc2392cd2a00fde3e15dda4d44c8b6874d7ac8a3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26574
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/drivers')
-rw-r--r-- | src/drivers/intel/fsp1_0/cache_as_ram.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_0/cache_as_ram.inc b/src/drivers/intel/fsp1_0/cache_as_ram.inc index eb21348e2f..d08f582f82 100644 --- a/src/drivers/intel/fsp1_0/cache_as_ram.inc +++ b/src/drivers/intel/fsp1_0/cache_as_ram.inc @@ -112,7 +112,7 @@ fake_fsp_stack: CAR_init_params: .long dummy_microcode .long 0 - .long 0xFFFFFFFF - CACHE_ROM_SIZE + 1 /* Firmware Location */ + .long CACHE_ROM_BASE /* Firmware Location */ .long CACHE_ROM_SIZE /* Total Firmware Length */ CAR_init_stack: |