soc/intel/common: remove mrc cache assumptions

Update the mrc cache implementation to use region_file. Instead
of relying on memory-mapped access and pointer arithmetic
use the region_devices and region_file to obtain the latest
data associated with the region. This removes the need for the
nvm wrapper as the region_devices can be used directly. Thus,
the library is more generic and can be extended to work on
different boot mediums.

BUG=chrome-os-partner:56151

Change-Id: Ic14e2d2f7339e50256b4a3a297fc33991861ca44
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17717
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

2 files changed, 46 insertions, 41 deletions

diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index bb3e96c051..73fb66dee6 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -19,6 +19,7 @@
 #include <arch/io.h>
 #include <arch/cbfs.h>
 #include <arch/early_variables.h>
+#include <assert.h>
 #include <boardid.h>
 #include <console/console.h>
 #include <cbmem.h>
@@ -99,7 +100,7 @@ void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
 /* Entry from the mainboard. */
 void romstage_common(struct romstage_params *params)
 {
-	const struct mrc_saved_data *cache;
+	struct region_device rdev;
 	struct pei_data *pei_data;
 
 	post_code(0x32);
@@ -127,11 +128,15 @@ void romstage_common(struct romstage_params *params)
 			printk(BIOS_DEBUG,
 			       "Recovery mode: not using MRC cache.\n");
 		} else if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)
-			&& (!mrc_cache_get_current_with_version(&cache,
-							params->fsp_version))) {
+			&& (!mrc_cache_get_current(MRC_TRAINING_DATA,
+							params->fsp_version,
+							&rdev))) {
 			/* MRC cache found */
-			params->pei_data->saved_data_size = cache->size;
-			params->pei_data->saved_data = &cache->data[0];
+			params->pei_data->saved_data_size =
+				region_device_sz(&rdev);
+			params->pei_data->saved_data = rdev_mmap_full(&rdev);
+			/* Assum boot device is memory mapped. */
+			assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED));
 		} else if (params->pei_data->boot_mode == ACPI_S3) {
 			/* Waking from S3 and no cache. */
 			printk(BIOS_DEBUG,
@@ -155,10 +160,10 @@ void romstage_common(struct romstage_params *params)
 		if ((params->pei_data->boot_mode != ACPI_S3)
 			&& (params->pei_data->data_to_save_size != 0)
 			&& (params->pei_data->data_to_save != NULL))
-				mrc_cache_stash_data_with_version(
+				mrc_cache_stash_data(MRC_TRAINING_DATA,
+					params->fsp_version,
 					params->pei_data->data_to_save,
-					params->pei_data->data_to_save_size,
-					params->fsp_version);
+					params->pei_data->data_to_save_size);
 	}
 
 	/* Save DIMM information */
@@ -355,15 +360,15 @@ __attribute__((weak)) void mainboard_add_dimm_info(
 }
 
 /* Get the memory configuration data */
-__attribute__((weak)) int mrc_cache_get_current_with_version(
-	const struct mrc_saved_data **cache, uint32_t version)
+__attribute__((weak)) int mrc_cache_get_current(int type, uint32_t version,
+				struct region_device *rdev)
 {
 	return -1;
 }
 
 /* Save the memory configuration data */
-__attribute__((weak)) int mrc_cache_stash_data_with_version(const void *data,
-	size_t size, uint32_t version)
+__attribute__((weak)) int mrc_cache_stash_data(int type, uint32_t version,
+					const void *data, size_t size)
 {
 	return -1;
 }
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 63a5733a6b..e9386d6f8d 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -15,6 +15,7 @@
 #include <arch/io.h>
 #include <arch/cpu.h>
 #include <arch/symbols.h>
+#include <assert.h>
 #include <cbfs.h>
 #include <cbmem.h>
 #include <console/console.h>
@@ -107,9 +108,9 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
 	 * code which saves the data to flash doesn't write if the latest
 	 * training data matches this one.
 	 */
-	if (mrc_cache_stash_data_with_version(mrc_data, mrc_data_size,
-						fsp_version) < 0)
-			printk(BIOS_ERR, "Failed to stash MRC data\n");
+	if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data,
+				mrc_data_size) < 0)
+		printk(BIOS_ERR, "Failed to stash MRC data\n");
 
 	mrc_cache_update_tpm_hash(mrc_data, mrc_data_size);
 }
@@ -146,24 +147,6 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
 	romstage_handoff_init(s3wake);
 }
 
-static const char *mrc_cache_get_region_name(void)
-{
-	/* In normal mode, always use DEFAULT_MRC_CACHE */
-	if (!vboot_recovery_mode_enabled())
-		return DEFAULT_MRC_CACHE;
-
-	/*
-	 * In recovery mode, force retraining by returning NULL if:
-	 * 1. Recovery cache is not supported, or
-	 * 2. Memory retrain switch is set.
-	 */
-	if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) ||
-	    vboot_recovery_mode_memory_retrain())
-		return NULL;
-
-	return RECOVERY_MRC_CACHE;
-}
-
 static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size)
 {
 	uint8_t data_hash[VB2_SHA256_DIGEST_SIZE];
@@ -209,29 +192,46 @@ static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size)
 static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake,
 				uint32_t fsp_version)
 {
-	const struct mrc_saved_data *mrc_cache;
-	const char *name;
+	struct region_device rdev;
+	void *data;
 
 	arch_upd->NvsBufferPtr = NULL;
 
 	if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS))
 		return;
 
-	name = mrc_cache_get_region_name();
+	/*
+	 * In recovery mode, force retraining:
+	 * 1. Recovery cache is not supported, or
+	 * 2. Memory retrain switch is set.
+	 */
+	if (vboot_recovery_mode_enabled()) {
+		if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE))
+			return;
+		if (vboot_recovery_mode_memory_retrain())
+			return;
+	}
+
+	if (mrc_cache_get_current(MRC_TRAINING_DATA, fsp_version, &rdev) < 0)
+		return;
+
+	/* Assume boot device is memory mapped. */
+	assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED));
+	data = rdev_mmap_full(&rdev);
 
-	if (mrc_cache_get_current_from_region(&mrc_cache, fsp_version, name))
+	if (data == NULL)
 		return;
 
-	if (!mrc_cache_verify_tpm_hash(mrc_cache->data, mrc_cache->size))
+	if (!mrc_cache_verify_tpm_hash(data, region_device_sz(&rdev)))
 		return;
 
 	/* MRC cache found */
-	arch_upd->NvsBufferPtr = (void *)mrc_cache->data;
+	arch_upd->NvsBufferPtr = data;
 	arch_upd->BootMode = s3wake ?
 		FSP_BOOT_ON_S3_RESUME:
 		FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
-	printk(BIOS_SPEW, "MRC cache found, size %x bootmode:%d\n",
-				mrc_cache->size, arch_upd->BootMode);
+	printk(BIOS_SPEW, "MRC cache found, size %zx bootmode:%d\n",
+				region_device_sz(&rdev), arch_upd->BootMode);
 }
 
 static enum cb_err check_region_overlap(const struct memranges *ranges,